Change in coreboot[master]: Documentation: Add section about SPD tools for TGL and JSL

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42092 )

Change subject: Documentation: Add section about SPD tools for TGL and JSL
......................................................................

Documentation: Add section about SPD tools for TGL and JSL

CB:41612 added a new set of tools for generating SPDs for TGL and JSL
based mainboards. This change adds relevant documentation to
coreboot-4.13 release notes.

Change-Id: I168adad25df9195dec64e8104f2dbe992eebddc6
Signed-off-by: Furquan Shaikh 
---
M Documentation/releases/coreboot-4.13-relnotes.md
1 file changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/42092/1

diff --git a/Documentation/releases/coreboot-4.13-relnotes.md b/Documentation/releases/coreboot-4.13-relnotes.md
index 1d8839f..046e4e6 100644
--- a/Documentation/releases/coreboot-4.13-relnotes.md
+++ b/Documentation/releases/coreboot-4.13-relnotes.md
@@ -28,4 +28,15 @@
 that its resources can be placed in a more natural location. This also adds the
 ability for the device to participate in SSDT generation.

+### Tools for generating SPDs for LP4x memory on TGL and JSL
+
+A set of new tools `gen_spd.go` and `gen_part_id.go` are added to automate the
+process of generating SPDs for LP4x memory and assigning hardware strap IDs for
+memory parts used on TGL and JSL based boards. The SPD data obtained from memory
+part vendors has to be massaged to format it correctly as per JEDEC and Intel MRC
+expectations. These tools take a list of memory parts describing their physical
+attributes as per their datasheet and convert those attributes into SPD files for
+the platforms. More details about the tools are added in
+[README.md](../../util/spd_tools/intel/lp4x/README.md).
+
 ### Add significant changes here

[Patrick Georgi (Code Review)]

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42092 )

Change subject: Documentation: Add section about SPD tools for TGL and JSL
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42092/1/Documentation/releases/core... 
File Documentation/releases/coreboot-4.13-relnotes.md:

https://review.coreboot.org/c/coreboot/+/42092/1/Documentation/releases/core... 
PS1, Line 40: [README.md](../../util/spd_tools/intel/lp4x/README.md).
I don't think we can use links to outside Documentation/ like that. As an alternative we could link to gitiles? https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/uti...

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42092 )

Change subject: Documentation: Add section about SPD tools for TGL and JSL
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/42092/1/Documentation/releases/core... 
File Documentation/releases/coreboot-4.13-relnotes.md:

https://review.coreboot.org/c/coreboot/+/42092/1/Documentation/releases/core... 
PS1, Line 40: [README.md](../../util/spd_tools/intel/lp4x/README.md).
> I don't think we can use links to outside Documentation/ like that. […]

Done

[Furquan Shaikh (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Paul Menzel, Karthik Ramasubramanian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42092

to look at the new patch set (#3).

Change subject: Documentation: Add section about SPD tools for TGL and JSL
......................................................................

Documentation: Add section about SPD tools for TGL and JSL

CB:41612 added a new set of tools for generating SPDs for TGL and JSL
based mainboards. This change adds relevant documentation to
coreboot-4.13 release notes.

Change-Id: I168adad25df9195dec64e8104f2dbe992eebddc6
Signed-off-by: Furquan Shaikh 
---
M Documentation/releases/coreboot-4.13-relnotes.md
1 file changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/42092/3

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42092 )

Change subject: Documentation: Add section about SPD tools for TGL and JSL
......................................................................

Patch Set 3: Code-Review+2

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42092 )

Change subject: Documentation: Add section about SPD tools for TGL and JSL
......................................................................

Documentation: Add section about SPD tools for TGL and JSL

CB:41612 added a new set of tools for generating SPDs for TGL and JSL
based mainboards. This change adds relevant documentation to
coreboot-4.13 release notes.

Change-Id: I168adad25df9195dec64e8104f2dbe992eebddc6
Signed-off-by: Furquan Shaikh 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42092
Reviewed-by: Karthik Ramasubramanian 
Tested-by: build bot (Jenkins) 
---
M Documentation/releases/coreboot-4.13-relnotes.md
1 file changed, 11 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/Documentation/releases/coreboot-4.13-relnotes.md b/Documentation/releases/coreboot-4.13-relnotes.md
index 1d8839f..2910867 100644
--- a/Documentation/releases/coreboot-4.13-relnotes.md
+++ b/Documentation/releases/coreboot-4.13-relnotes.md
@@ -28,4 +28,15 @@
 that its resources can be placed in a more natural location. This also adds the
 ability for the device to participate in SSDT generation.

+### Tools for generating SPDs for LP4x memory on TGL and JSL
+
+A set of new tools `gen_spd.go` and `gen_part_id.go` are added to automate the
+process of generating SPDs for LP4x memory and assigning hardware strap IDs for
+memory parts used on TGL and JSL based boards. The SPD data obtained from memory
+part vendors has to be massaged to format it correctly as per JEDEC and Intel MRC
+expectations. These tools take a list of memory parts describing their physical
+attributes as per their datasheet and convert those attributes into SPD files for
+the platforms. More details about the tools are added in
+[README.md](https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/uti...).
+
 ### Add significant changes here