Change in coreboot[master]: soc/amd/common: Add func to clear eSPI IO & memory decode ranges

[Martin Roth (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Felix Held.
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51748 )

Change subject: soc/amd/common: Add func to clear eSPI IO & memory decode ranges
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/51748/comment/a59685dc_838fe5e2 
PS1, Line 10: This clears all the ranges so
            : the eSPI configuration can start fresh.
> And is there a bug to ensure that PSP behavior is fixed?

Yes.  It should be fixed in the next PSP release.