Change in coreboot[master]: mb/google/brya: Lock PCH WP pin in brask and brya baseboards

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61501 )

Change subject: mb/google/brya: Lock PCH WP pin in brask and brya baseboards
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mb/google/brya: Lock PCH WP pin in brask and brya baseboards

This applies a configuration lock to the PCH write protect GPIO for
all brya and brask variants.

Signed-off-by: Subrata Banik 
Change-Id: Ia125c513c09ecbb1047100e72f8540369646988e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61501
Tested-by: build bot (Jenkins) 
Reviewed-by: EricR Lai 
---
M src/mainboard/google/brya/variants/baseboard/brask/gpio.c
M src/mainboard/google/brya/variants/baseboard/brya/gpio.c
2 files changed, 2 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  EricR Lai: Looks good to me, approved

diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c
index 22b2c70..203f6d9 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c
@@ -189,7 +189,7 @@
    /* E14 : DDSP_HPDA ==> SOC_DP_HPD */
    PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
    /* E15 : RSVD_TP ==> PCH_WP_OD */
-	PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP),
+	PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_E15, NONE, LOCK_CONFIG),
    /* E16 : RSVD_TP ==> CLKREQ_8 */
    PAD_NC(GPP_E16, NONE),
    /* E17 : THC0_SPI1_INT# ==> TP102 */
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
index fffbbc8..7db7cd4 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
@@ -188,7 +188,7 @@
    /* E14 : DDSP_HPDA ==> SOC_EDP_HPD */
    PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
    /* E15 : RSVD_TP ==> PCH_WP_OD */
-	PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP),
+	PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_E15, NONE, LOCK_CONFIG),
    /* E16 : RSVD_TP ==> WWAN_RST_L */
    PAD_CFG_GPO(GPP_E16, 1, DEEP),
    /* E17 : THC0_SPI1_INT# ==> WWAN_CONFIG3 */
@@ -458,7 +458,6 @@
 }

static struct gpio_lock_config lockable_brya_gpios[] = {
-	{ GPP_E15, GPIO_LOCK_CONFIG },	/* PCH_WP_OD */
    { GPP_F11, GPIO_LOCK_CONFIG },	/* GSPI_PCH_CLK_FPMCU_R */
    { GPP_F13, GPIO_LOCK_CONFIG },	/* GSPI_PCH_D1_FPMCU_D0 */
    { GPP_F12, GPIO_LOCK_CONFIG },	/* GSPI_PCH_D0_FPMCU_D1_R */

2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.