[S] Change in coreboot[master]: soc/intel/meteorlake: Enable tbtPcie2/3

[Ivy Jian (Code Review)]

Ivy Jian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67530 )

Change subject: soc/intel/meteorlake: Enable tbtPcie2/3
......................................................................

soc/intel/meteorlake: Enable tbtPcie2/3

Adding support enables/disables tbtPcie2/3 by usb4_params.

BUG=b:244687646
TEST= TRP2/3 are enabled as expected.

Signed-off-by: Ivy Jian 
Change-Id: Ia1bdc9b5c0533bdddae67b8039103162a57fdc39
---
M src/soc/intel/meteorlake/romstage/fsp_params.c
1 file changed, 17 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/67530/1

diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index be242e9..109a744 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -230,6 +230,8 @@

m_cfg->TcssItbtPcie0En = !(config->tbt_pcie_port_disable[0]);
    m_cfg->TcssItbtPcie1En = !(config->tbt_pcie_port_disable[1]);
+	m_cfg->TcssItbtPcie2En = !(config->tbt_pcie_port_disable[2]);
+	m_cfg->TcssItbtPcie3En = !(config->tbt_pcie_port_disable[3]);
 }

static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg,