Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37593 )
Change subject: soc/sifive/fu540: Fix RISCV_ARCH / RISCV_ABI to support float ......................................................................
soc/sifive/fu540: Fix RISCV_ARCH / RISCV_ABI to support float
fu540 hart 0 is based on rv64imac, other hart is based on rv64imafdc. coreboot supports low-privileged non-aligned memory access, which requires the compiler to enable floating-point functionality. Compiling the src/arch/riscv/fp_asm.S file before the correction will not generate any instructions.
Change-Id: I0f4828046aeb4803d4437c6adad2191684a632f7 Signed-off-by: Xiang Wang merle@hardenedlinux.org --- M src/soc/sifive/fu540/Kconfig 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/37593/1
diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig index 97c67bf..4ff2827 100644 --- a/src/soc/sifive/fu540/Kconfig +++ b/src/soc/sifive/fu540/Kconfig @@ -30,11 +30,11 @@
config RISCV_ARCH string - default "rv64imac" + default "rv64imafdc"
config RISCV_ABI string - default "lp64" + default "lp64d"
config RISCV_CODEMODEL string
Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37593 )
Change subject: soc/sifive/fu540: Fix RISCV_ARCH / RISCV_ABI to support float ......................................................................
Patch Set 1:
Have anything update ?
Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37593 )
Change subject: soc/sifive/fu540: Fix RISCV_ARCH / RISCV_ABI to support float ......................................................................
Patch Set 1:
Have anything update?
Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37593 )
Change subject: soc/sifive/fu540: Fix RISCV_ARCH / RISCV_ABI to support float ......................................................................
Patch Set 1:
Have anything update?
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37593?usp=email )
Change subject: soc/sifive/fu540: Fix RISCV_ARCH / RISCV_ABI to support float ......................................................................
Abandoned