Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
vc/amd/fsp: Update bl_errorcodes_public.h
Replace the initial bl_errorcodes_public.h (a temporary, minimal version) with the full version released by AMD.
BUG=None TEST=Build BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I82585c74d74139a96419b9bffe1df3b8c344eb5f --- M src/soc/amd/picasso/psp_verstage/fch.c M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S M src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h 3 files changed, 58 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/45943/1
diff --git a/src/soc/amd/picasso/psp_verstage/fch.c b/src/soc/amd/picasso/psp_verstage/fch.c index 89e7014..c3f8377 100644 --- a/src/soc/amd/picasso/psp_verstage/fch.c +++ b/src/soc/amd/picasso/psp_verstage/fch.c @@ -124,13 +124,13 @@ bar_map[i].set_bar(bar); }
- return BL_UAPP_OK; + return (uint32_t)BL_OK; }
uint32_t unmap_fch_devices(void) { void *bar; - uint32_t err, rtn = BL_UAPP_OK; + uint32_t err, rtn = (uint32_t)BL_OK; unsigned int i;
for (i = 0; i < ARRAY_SIZE(bar_map); ++i) { diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S index 88bbf7e..15340d5 100644 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S +++ b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S @@ -72,7 +72,7 @@ // to main BL using Svc_Exit(). // ShouldNotBeReached: - mov r0, #BL_UAPP_ERR_GENERIC // Returned from Main + mov r0, #BL_ERR_GENERIC // Returned from Main svc #0x0 // SVC_EXIT
ENDPROC(_psp_vs_start) @@ -95,7 +95,7 @@ bne ret
svcExit: - mov r0, #BL_UAPP_ERR_GENERIC + mov r0, #BL_ERR_GENERIC svc #0x0 // SVC_EXIT
ret: diff --git a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h index ab24750..c6c052d 100644 --- a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h +++ b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h @@ -1,6 +1,6 @@ /***************************************************************************** * - * Copyright (c) 2019, Advanced Micro Devices, Inc. + * Copyright (c) 2020, Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -30,7 +30,58 @@ #ifndef BL_ERRORCODES_PUBLIC_H #define BL_ERRORCODES_PUBLIC_H
-#define BL_UAPP_OK 0x00 // General - Success -#define BL_UAPP_ERR_GENERIC 0x01 // Generic Error Code +/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ +typedef enum BL_RETCODE_T +{ + BL_OK = 0x00, // General - Success + BL_ERR_GENERIC = 0x01, // Generic Error Code + BL_ERR_MEMORY = 0x02, // Generic Memory Error + BL_ERR_BUFFER_OVERFLOW = 0x03, // Buffer Overflow + BL_ERR_INVALID_PARAMETER = 0x04, // Invalid Parameter(s) + BL_ERR_DATA_ALIGNMENT = 0x06, // Data Alignment Error + BL_ERR_NULL_PTR = 0x07, // Null Pointer Error + BL_ERR_INVALID_ADDRESS = 0x0A, // Invalid Address + BL_ERR_OUT_OF_RESOURCES = 0x0B, // Out of Resource Error + BL_ERR_DATA_ABORT = 0x0D, // Data Abort exception + BL_ERR_PREFETCH_ABORT = 0x0E, // Prefetch Abort exception + BL_ERR_GET_FW_HEADER = 0x13, // Failure in retrieving firmware + // header + BL_ERR_KEY_SIZE = 0x14, // Key size not supported + BL_ERR_ENTRY_NOT_FOUND = 0x15, // Entry not found at requested + // location + BL_ERR_UNSUPPORTED_PLATFORM = 0x16, // Error when feature is not enabled + // on a given platform. + BL_ERR_FWVALIDATION = 0x18, // Generic FW Validation error + BL_ERR_CCP_RSA = 0x19, // RSA operation fail - bootloader + BL_ERR_CCP_PASSTHR = 0x1A, // CCP Passthrough operation failed + BL_ERR_CCP_AES = 0x1B, // AES operation failed + BL_ERR_SHA = 0x1E, // SHA256/SHA384 operation failed + BL_ERR_ZLIB = 0x1F, // ZLib Decompression operation fail + BL_ERR_DIR_ENTRY_NOT_FOUND = 0x22, // PSP directory entry not found + BL_ERR_SYSHUBMAP_FAILED = 0x3A, // Unable to map a SYSHUB address to + // AXI space + BL_ERR_UAPP_PSP_HEADER_NOT_MATCH = 0x7A, // PSP level directory from OEM user- + // app does not match expected value. + BL_ERR_UAPP_BIOS_HEADER_NOT_MATCH = 0x7B, // BIOS level directory from OEM + // user-app not match expected value. + BL_ERR_UAPP_PSP_DIR_OFFSET_NOT_SET = 0x7C, // PSP Directory offset is not set + // by OEM user-app. + BL_ERR_UAPP_BIOS_DIR_OFFSET_NOT_SET = 0x7D, // BIOS Directory offset is not set + // by OEM user-app. + BL_ERR_POSTCODE_MAX_VALUE = 0x9F, // The maximum allowable error post + // code +} BL_RETCODE; + +/* Bootloader Return Codes, Success only (0xA0 through 0xFF) */ +typedef enum BL_TRACECODE_T +{ + BL_SUCCESS_USERMODE_OEM_APP = 0xF7, // Updated only PSPFW Status when OEM + // PSP BL user app returns success. + BL_SUCCESS_PSP_BIOS_DIRECTORY_UPDATE = 0xF8, // PSP and BIOS directories are loaded + // into SRAM from the offset provided + // by OEM user app. + + BL_SUCCESS_LAST_CODE = 0xFF, // Bootloader sequence finished +} BL_TRACECODE;
#endif // BL_ERRORCODES_PUBLIC_H
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45943
to look at the new patch set (#2).
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
vc/amd/fsp: Update bl_errorcodes_public.h
Replace the initial bl_errorcodes_public.h (a temporary, minimal version) with the full version released by AMD.
BUG=None TEST=Build BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I82585c74d74139a96419b9bffe1df3b8c344eb5f --- M src/soc/amd/picasso/psp_verstage/fch.c M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S M src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h 3 files changed, 52 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/45943/2
Eric Peers has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/45943/2/src/vendorcode/amd/fsp/pica... File src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h:
https://review.coreboot.org/c/coreboot/+/45943/2/src/vendorcode/amd/fsp/pica... PS2, Line 3: * Copyright (c) 2020, Advanced Micro Devices, Inc. does this need a dual date Copyright? (e.g. 2019-2020) I see both styles in coreboot.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45943/2/src/soc/amd/picasso/psp_ver... File src/soc/amd/picasso/psp_verstage/fch.c:
https://review.coreboot.org/c/coreboot/+/45943/2/src/soc/amd/picasso/psp_ver... PS2, Line 127: (uint32_t) I'm not seeing why these casts were necessary
https://review.coreboot.org/c/coreboot/+/45943/2/src/vendorcode/amd/fsp/pica... File src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h:
https://review.coreboot.org/c/coreboot/+/45943/2/src/vendorcode/amd/fsp/pica... PS2, Line 3: * Copyright (c) 2020, Advanced Micro Devices, Inc.
does this need a dual date Copyright? (e.g. 2019-2020) I see both styles in coreboot.
I'm kind of a meh on using 2019. This file first showed up in the coreboot source in 2020. And looking at various versions of this file (as delivered), AMD has not been diligent about the copyright date.
Hello build bot (Jenkins), Marshall Dawson, Kangheui Won, Eric Peers, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45943
to look at the new patch set (#3).
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
vc/amd/fsp: Update bl_errorcodes_public.h
Replace the initial bl_errorcodes_public.h (a temporary, minimal version) with the full version released by AMD.
BUG=None TEST=Build BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I82585c74d74139a96419b9bffe1df3b8c344eb5f --- M src/soc/amd/picasso/psp_verstage/fch.c M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S M src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h 3 files changed, 52 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/45943/3
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45943/2/src/soc/amd/picasso/psp_ver... File src/soc/amd/picasso/psp_verstage/fch.c:
https://review.coreboot.org/c/coreboot/+/45943/2/src/soc/amd/picasso/psp_ver... PS2, Line 127: (uint32_t)
I'm not seeing why these casts were necessary
Done
https://review.coreboot.org/c/coreboot/+/45943/2/src/vendorcode/amd/fsp/pica... File src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h:
https://review.coreboot.org/c/coreboot/+/45943/2/src/vendorcode/amd/fsp/pica... PS2, Line 3: * Copyright (c) 2020, Advanced Micro Devices, Inc.
I'm kind of a meh on using 2019. This file first showed up in the coreboot source in 2020. […]
This came from AMD with the copyright 2020, so I left it. I honestly don't think it really matters, as the old copyright is in the git history, so if there were a question, we could go back to that. Also, my understanding is that there's no need to do 2019-2020, because the oldest copyright date applies. I don't know the various copyright laws around the world, but if this file is still in use when the copyright expires in the US, I'll be amazed.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
Patch Set 3: Code-Review+2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
Patch Set 3: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45943 )
Change subject: vc/amd/fsp: Update bl_errorcodes_public.h ......................................................................
vc/amd/fsp: Update bl_errorcodes_public.h
Replace the initial bl_errorcodes_public.h (a temporary, minimal version) with the full version released by AMD.
BUG=None TEST=Build BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I82585c74d74139a96419b9bffe1df3b8c344eb5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/45943 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/picasso/psp_verstage/fch.c M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S M src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h 3 files changed, 52 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved
diff --git a/src/soc/amd/picasso/psp_verstage/fch.c b/src/soc/amd/picasso/psp_verstage/fch.c index 7d0b856..b813770 100644 --- a/src/soc/amd/picasso/psp_verstage/fch.c +++ b/src/soc/amd/picasso/psp_verstage/fch.c @@ -124,13 +124,13 @@ bar_map[i].set_bar(bar); }
- return BL_UAPP_OK; + return BL_OK; }
uint32_t unmap_fch_devices(void) { void *bar; - uint32_t err, rtn = BL_UAPP_OK; + uint32_t err, rtn = BL_OK; unsigned int i;
for (i = 0; i < ARRAY_SIZE(bar_map); ++i) { diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S index 88bbf7e..15340d5 100644 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S +++ b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S @@ -72,7 +72,7 @@ // to main BL using Svc_Exit(). // ShouldNotBeReached: - mov r0, #BL_UAPP_ERR_GENERIC // Returned from Main + mov r0, #BL_ERR_GENERIC // Returned from Main svc #0x0 // SVC_EXIT
ENDPROC(_psp_vs_start) @@ -95,7 +95,7 @@ bne ret
svcExit: - mov r0, #BL_UAPP_ERR_GENERIC + mov r0, #BL_ERR_GENERIC svc #0x0 // SVC_EXIT
ret: diff --git a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h index ab24750..1d5e86f 100644 --- a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h +++ b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_errorcodes_public.h @@ -1,6 +1,6 @@ /***************************************************************************** * - * Copyright (c) 2019, Advanced Micro Devices, Inc. + * Copyright (c) 2020, Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -30,7 +30,51 @@ #ifndef BL_ERRORCODES_PUBLIC_H #define BL_ERRORCODES_PUBLIC_H
-#define BL_UAPP_OK 0x00 // General - Success -#define BL_UAPP_ERR_GENERIC 0x01 // Generic Error Code +/* Bootloader Return Codes, Error only (0x00 through 0x9F) */ +#define BL_OK 0x00 // General - Success +#define BL_ERR_GENERIC 0x01 // Generic Error Code +#define BL_ERR_MEMORY 0x02 // Generic Memory Error +#define BL_ERR_BUFFER_OVERFLOW 0x03 // Buffer Overflow +#define BL_ERR_INVALID_PARAMETER 0x04 // Invalid Parameter(s) +#define BL_ERR_DATA_ALIGNMENT 0x06 // Data Alignment Error +#define BL_ERR_NULL_PTR 0x07 // Null Pointer Error +#define BL_ERR_INVALID_ADDRESS 0x0A // Invalid Address +#define BL_ERR_OUT_OF_RESOURCES 0x0B // Out of Resource Error +#define BL_ERR_DATA_ABORT 0x0D // Data Abort exception +#define BL_ERR_PREFETCH_ABORT 0x0E // Prefetch Abort exception +#define BL_ERR_GET_FW_HEADER 0x13 // Failure in retrieving firmware + // header +#define BL_ERR_KEY_SIZE 0x14 // Key size not supported +#define BL_ERR_ENTRY_NOT_FOUND 0x15 // Entry not found at requested + // location +#define BL_ERR_UNSUPPORTED_PLATFORM 0x16 // Error when feature is not enabled + // on a given platform. +#define BL_ERR_FWVALIDATION 0x18 // Generic FW Validation error +#define BL_ERR_CCP_RSA 0x19 // RSA operation fail - bootloader +#define BL_ERR_CCP_PASSTHR 0x1A // CCP Passthrough operation failed +#define BL_ERR_CCP_AES 0x1B // AES operation failed +#define BL_ERR_SHA 0x1E // SHA256/SHA384 operation failed +#define BL_ERR_ZLIB 0x1F // ZLib Decompression operation fail +#define BL_ERR_DIR_ENTRY_NOT_FOUND 0x22 // PSP directory entry not found +#define BL_ERR_SYSHUBMAP_FAILED 0x3A // Unable to map a SYSHUB address to + // AXI space +#define BL_ERR_UAPP_PSP_HEADER_NOT_MATCH 0x7A // PSP level directory from OEM user- + // app does not match expected value. +#define BL_ERR_UAPP_BIOS_HEADER_NOT_MATCH 0x7B // BIOS level directory from OEM + // user-app not match expected value. +#define BL_ERR_UAPP_PSP_DIR_OFFSET_NOT_SET 0x7C // PSP Directory offset is not set + // by OEM user-app. +#define BL_ERR_UAPP_BIOS_DIR_OFFSET_NOT_SET 0x7D // BIOS Directory offset is not set + // by OEM user-app. +#define BL_ERR_POSTCODE_MAX_VALUE 0x9F // The maximum allowable error post
-#endif // BL_ERRORCODES_PUBLIC_H +/* Bootloader Return Codes, Success only (0xA0 through 0xFF) */ +#define BL_SUCCESS_USERMODE_OEM_APP 0xF7 // Updated only PSPFW Status when OEM + // PSP BL user app returns success. +#define BL_SUCCESS_PSP_BIOS_DIRECTORY_UPDATE 0xF8 // PSP and BIOS directories are loaded + // into SRAM from the offset provided + // by OEM user app. + +#define BL_SUCCESS_LAST_CODE 0xFF // Bootloader sequence finished + +#endif /* BL_ERRORCODES_PUBLIC_H */
-
Eric Peers (Code Review) -
Felix Held (Code Review)
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Marshall Dawson (Code Review)
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Martin Roth (Code Review)