Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Michał Żygowski, Nick Vaccaro, Subrata Banik.
Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84620?usp=email )
Change subject: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports ......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/alderlake/acpi/pcie_pch_s.asl:
https://review.coreboot.org/c/coreboot/+/84620/comment/199706cf_0f07dbb6?usp... : PS2, Line 278: : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (PEG1) : { : Name (_ADR, 0x00010000) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (PEG2) : { : Name (_ADR, 0x00010001) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : }
For PCH-S this is the only set of IRQs that was working: […]
Done