Change subject: soc/intel/*: drop UART pad configuration from common code
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And FSP will always program the GPIO pad base on uart selection base on FSP upd setting
What UPDs are those? I thought we agreed in the past that FSP
shouldn't do any pad configuration?
Shouldn't, but it does :/ see current discussion at CB:48340. I'll check if we can do anything for platforms without the new UPD
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