Change in coreboot[master]: src/intel/xeon_sp: add hardware error support (HEST)

[Rocky Phagura (Code Review)]

Attention is currently required from: Marc Jones, Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Rocky Phagura, Tim Wawrzynczak, David Hendricks, Angel Pons, Arthur Heymans, Morgan Jang, Patrick Rudolph, Tim Chu.
Rocky Phagura has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52090 )

Change subject: src/intel/xeon_sp: add hardware error support (HEST)
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Patch Set 20:

(1 comment)

File src/soc/intel/xeon_sp/uncore.c:

https://review.coreboot.org/c/coreboot/+/52090/comment/5bbac885_fae7c2c4 
PS18, Line 149: * +--------------------------+ cbmem_top
              :  * |     HEST ELOG            | (CONFIG_ERROR_LOG_BUFFER_SIZE)
              :  * +--------------------------+
> > > > Done...corrected the map so that HEST ELOG is above cbmem_top.  […]

Done....changes made based on the above patch. CBMEM is now properly labeling the memory as "reserved" instead of "unknown" in E820.  Changes in src/soc/intel/xeon_sp/uncore.c are no longer needed and have been removed. Thank you