[S] Change in coreboot[main]: soc/intel/common/block/cse: Add API to match current PM event

[Jérémy Compostella (Code Review)]

Attention is currently required from: Intel coreboot Reviewers, Karthik Ramasubramanian, Krishna P Bhat D, Sowmya Aralguppe, Subrata Banik.

Jérémy Compostella has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/86169?usp=email )

Change subject: soc/intel/common/block/cse: Add API to match current PM event
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Patch Set 3:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/86169/comment/99db2725_7139ff15?usp... :
PS1, Line 9: Introduce an API to read the CSME host firmware status register for
> nit: Introduce an API to read the CSME (Converged Security and Management Engine) host firmware stat […]

Done

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/86169/comment/4ee1c519_e0746040?usp... :
PS1, Line 302: #define ME_HFSTS2_CUR_PM_EVENT_MASK (0xF << ME_HFSTS2_CUR_PM_EVENT_SHIFT)
> Usually coreboot uses lower case for hexadecimal constant values.

Done

https://review.coreboot.org/c/coreboot/+/86169/comment/5c0b6199_ac6fc678?usp... :
PS1, Line 303: static uint8_t cse_get_hfs2_current_pm_event(void)
> nit: An empty line would be nice.

Done

File src/soc/intel/common/block/include/intelblocks/cse.h:

https://review.coreboot.org/c/coreboot/+/86169/comment/c17a8f91_88356f05?usp... :
PS1, Line 387: 	PWR_CYCLE_RESET_CMOFF = 0xB,
> Usually coreboot uses lower case for hexadecimal constant values.

Done