[S] Change in coreboot[master]: soc/intel/alderlake: Disable C1E on RPL CPUs - coreboot-gerrit

1 May 2023


      Attention is currently required from: YH Lin, Tarun Tuli, Paul Menzel, Nick Vaccaro, Eric Lai.
Joey Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74727 )
Change subject: soc/intel/alderlake: Disable C1E on RPL CPUs
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Patch Set 9:
(1 comment)
File src/soc/intel/alderlake/chip.h:
https://review.coreboot.org/c/coreboot/+/74727/comment/f92c8eb5_f84d934e 
PS7, Line 690: c1e
...
We will add the CPU ID judgement in fsp_params. […]
Hi google team, due to tight schedule, we would need this CL to merge ASAP.Kindly please help to review and approve if there are no concerns, thanks!
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342
Gerrit-Change-Number: 74727
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