Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45033 )
Change subject: soc/intel/broadwell: Drop `gpu_panel_port_select` ......................................................................
soc/intel/broadwell: Drop `gpu_panel_port_select`
The corresponding bits in PP_ON_DELAYS are reserved MBZ.
Change-Id: I9789a7d50c4bce2ccad0bf476f877db25e3ff82e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/auron/variants/auron_paine/overridetree.cb M src/mainboard/google/auron/variants/auron_yuna/overridetree.cb M src/mainboard/google/auron/variants/buddy/overridetree.cb M src/mainboard/google/auron/variants/gandof/overridetree.cb M src/mainboard/google/auron/variants/lulu/overridetree.cb M src/mainboard/google/auron/variants/samus/overridetree.cb M src/mainboard/purism/librem_bdw/devicetree.cb M src/soc/intel/broadwell/chip.h M src/soc/intel/broadwell/igd.c 9 files changed, 7 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/45033/1
diff --git a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb index 70b1ebd..60aef30 100644 --- a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb index 67b9131..da80fec 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb index f814280..f148964 100644 --- a/src/mainboard/google/auron/variants/buddy/overridetree.cb +++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/gandof/overridetree.cb b/src/mainboard/google/auron/variants/gandof/overridetree.cb index e35d3a5..75c202d 100644 --- a/src/mainboard/google/auron/variants/gandof/overridetree.cb +++ b/src/mainboard/google/auron/variants/gandof/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/lulu/overridetree.cb b/src/mainboard/google/auron/variants/lulu/overridetree.cb index 70b1ebd..60aef30 100644 --- a/src/mainboard/google/auron/variants/lulu/overridetree.cb +++ b/src/mainboard/google/auron/variants/lulu/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb index 93e96ca..c5d2747 100644 --- a/src/mainboard/google/auron/variants/samus/overridetree.cb +++ b/src/mainboard/google/auron/variants/samus/overridetree.cb @@ -3,8 +3,7 @@ # Enable DDI2 Hotplug with 6ms pulse register "gpu_dp_c_hotplug" = "0x06"
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "6" # 500ms register "gpu_panel_power_up_delay" = "2000" # 200ms register "gpu_panel_power_down_delay" = "500" # 50ms diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb index 0d44cd7..b7c6fe5 100644 --- a/src/mainboard/purism/librem_bdw/devicetree.cb +++ b/src/mainboard/purism/librem_bdw/devicetree.cb @@ -9,8 +9,7 @@ # Set backlight PWM value for eDP register "gpu_pch_backlight_pwm_hz" = "200"
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "6" # 500ms register "gpu_panel_power_up_delay" = "2000" # 200ms register "gpu_panel_power_down_delay" = "500" # 50ms diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index 5543998..f559410 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -84,7 +84,6 @@ u8 gpu_dp_d_hotplug;
/* Panel power sequence timings */ - u8 gpu_panel_port_select; u8 gpu_panel_power_cycle_delay; u16 gpu_panel_power_up_delay; u16 gpu_panel_power_down_delay; diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index 41167b1..ba453cdb2 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -298,7 +298,6 @@ /* Setup Panel Power On Delays */ reg32 = gtt_read(PCH_PP_ON_DELAYS); if (!reg32) { - reg32 = (conf->gpu_panel_port_select & 0x3) << 30; reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16; reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff); gtt_write(PCH_PP_ON_DELAYS, reg32);
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45033 )
Change subject: soc/intel/broadwell: Drop `gpu_panel_port_select` ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45033 )
Change subject: soc/intel/broadwell: Drop `gpu_panel_port_select` ......................................................................
soc/intel/broadwell: Drop `gpu_panel_port_select`
The corresponding bits in PP_ON_DELAYS are reserved MBZ.
Change-Id: I9789a7d50c4bce2ccad0bf476f877db25e3ff82e Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45033 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/google/auron/variants/auron_paine/overridetree.cb M src/mainboard/google/auron/variants/auron_yuna/overridetree.cb M src/mainboard/google/auron/variants/buddy/overridetree.cb M src/mainboard/google/auron/variants/gandof/overridetree.cb M src/mainboard/google/auron/variants/lulu/overridetree.cb M src/mainboard/google/auron/variants/samus/overridetree.cb M src/mainboard/purism/librem_bdw/devicetree.cb M src/soc/intel/broadwell/chip.h M src/soc/intel/broadwell/igd.c 9 files changed, 7 insertions(+), 16 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb index 70b1ebd..60aef30 100644 --- a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb index 67b9131..da80fec 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb index f814280..f148964 100644 --- a/src/mainboard/google/auron/variants/buddy/overridetree.cb +++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/gandof/overridetree.cb b/src/mainboard/google/auron/variants/gandof/overridetree.cb index e35d3a5..75c202d 100644 --- a/src/mainboard/google/auron/variants/gandof/overridetree.cb +++ b/src/mainboard/google/auron/variants/gandof/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/lulu/overridetree.cb b/src/mainboard/google/auron/variants/lulu/overridetree.cb index 70b1ebd..60aef30 100644 --- a/src/mainboard/google/auron/variants/lulu/overridetree.cb +++ b/src/mainboard/google/auron/variants/lulu/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/broadwell
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "5" # 400ms register "gpu_panel_power_up_delay" = "400" # 40ms register "gpu_panel_power_down_delay" = "150" # 15ms diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb index 93e96ca..c5d2747 100644 --- a/src/mainboard/google/auron/variants/samus/overridetree.cb +++ b/src/mainboard/google/auron/variants/samus/overridetree.cb @@ -3,8 +3,7 @@ # Enable DDI2 Hotplug with 6ms pulse register "gpu_dp_c_hotplug" = "0x06"
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "6" # 500ms register "gpu_panel_power_up_delay" = "2000" # 200ms register "gpu_panel_power_down_delay" = "500" # 50ms diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb index 0d44cd7..b7c6fe5 100644 --- a/src/mainboard/purism/librem_bdw/devicetree.cb +++ b/src/mainboard/purism/librem_bdw/devicetree.cb @@ -9,8 +9,7 @@ # Set backlight PWM value for eDP register "gpu_pch_backlight_pwm_hz" = "200"
- # Enable Panel and configure power delays - register "gpu_panel_port_select" = "1" # eDP + # Set panel power delays register "gpu_panel_power_cycle_delay" = "6" # 500ms register "gpu_panel_power_up_delay" = "2000" # 200ms register "gpu_panel_power_down_delay" = "500" # 50ms diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index 5543998..f559410 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -84,7 +84,6 @@ u8 gpu_dp_d_hotplug;
/* Panel power sequence timings */ - u8 gpu_panel_port_select; u8 gpu_panel_power_cycle_delay; u16 gpu_panel_power_up_delay; u16 gpu_panel_power_down_delay; diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index 41167b1..ba453cdb2 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -298,7 +298,6 @@ /* Setup Panel Power On Delays */ reg32 = gtt_read(PCH_PP_ON_DELAYS); if (!reg32) { - reg32 = (conf->gpu_panel_port_select & 0x3) << 30; reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16; reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff); gtt_write(PCH_PP_ON_DELAYS, reg32);
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45033 )
Change subject: soc/intel/broadwell: Drop `gpu_panel_port_select` ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 7/1/8 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/18077 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18076 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/18075 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18074 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/18073 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/18080 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/18079 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18078
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Angel Pons (Code Review)
-
Nico Huber (Code Review)
-
Patrick Georgi (Code Review)