Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14915
-gerrit
commit 8142256cea053aed705cb53049493b7ef7bbd95e Author: Akshay Saraswat akshay.s@samsung.com Date: Thu Aug 7 18:04:34 2014 +0530
Jazz: Add support for new mainboard
Adding new mainboard directory and corresponding files for Exynos7 based Jazz reference board.
BUG=None BRANCH=None TEST=Compiled and booted coreboot over Jazz with this series
Change-Id: Iad84881bca253fa405c227815104e152b22fc4fc Signed-off-by: Akshay Saraswat akshay.s@samsung.com --- src/mainboard/samsung/jazz/Kconfig | 36 +++++++++++++++ src/mainboard/samsung/jazz/Kconfig.name | 2 + src/mainboard/samsung/jazz/Makefile.inc | 24 ++++++++++ src/mainboard/samsung/jazz/board_info.txt | 1 + src/mainboard/samsung/jazz/devicetree.cb | 18 ++++++++ src/mainboard/samsung/jazz/mainboard.c | 73 +++++++++++++++++++++++++++++++ src/mainboard/samsung/jazz/memlayout.ld | 16 +++++++ src/mainboard/samsung/jazz/romstage.c | 64 +++++++++++++++++++++++++++ 8 files changed, 234 insertions(+)
diff --git a/src/mainboard/samsung/jazz/Kconfig b/src/mainboard/samsung/jazz/Kconfig new file mode 100644 index 0000000..1d528b7 --- /dev/null +++ b/src/mainboard/samsung/jazz/Kconfig @@ -0,0 +1,36 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Samsung Electronics Ltd. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +if BOARD_SAMSUNG_JAZZ + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select SOC_SAMSUNG_EXYNOS7 + select BOARD_ROMSIZE_KB_4096 + select HAVE_INIT_TIMER + +config MAINBOARD_DIR + string + default samsung/jazz + +config MAINBOARD_PART_NUMBER + string + default "Jazz" + +config DRAM_SIZE_MB + int + default 2048 + +endif # BOARD_SAMSUNG_JAZZ diff --git a/src/mainboard/samsung/jazz/Kconfig.name b/src/mainboard/samsung/jazz/Kconfig.name new file mode 100644 index 0000000..0229585 --- /dev/null +++ b/src/mainboard/samsung/jazz/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_SAMSUNG_JAZZ + bool "Jazz" diff --git a/src/mainboard/samsung/jazz/Makefile.inc b/src/mainboard/samsung/jazz/Makefile.inc new file mode 100644 index 0000000..6879e79 --- /dev/null +++ b/src/mainboard/samsung/jazz/Makefile.inc @@ -0,0 +1,24 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Samsung Electronics +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +INCLUDES += -Isrc/soc/samsung/exynos7/include/ + +bootblock-y += memlayout.ld + +romstage-y += memlayout.ld +romstage-y += romstage.c + +ramstage-y += mainboard.c +ramstage-y += memlayout.ld diff --git a/src/mainboard/samsung/jazz/board_info.txt b/src/mainboard/samsung/jazz/board_info.txt new file mode 100644 index 0000000..b351b8e --- /dev/null +++ b/src/mainboard/samsung/jazz/board_info.txt @@ -0,0 +1 @@ +Category: eval diff --git a/src/mainboard/samsung/jazz/devicetree.cb b/src/mainboard/samsung/jazz/devicetree.cb new file mode 100644 index 0000000..672a48e --- /dev/null +++ b/src/mainboard/samsung/jazz/devicetree.cb @@ -0,0 +1,18 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Samsung Electronics +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +chip soc/samsung/exynos7 + device cpu_cluster 0 on end +end diff --git a/src/mainboard/samsung/jazz/mainboard.c b/src/mainboard/samsung/jazz/mainboard.c new file mode 100644 index 0000000..c2487ad --- /dev/null +++ b/src/mainboard/samsung/jazz/mainboard.c @@ -0,0 +1,73 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Samsung Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <string.h> +#include <console/console.h> +#include <device/device.h> +#include <device/i2c.h> +#include <cbmem.h> +#include <delay.h> +#include <vbe.h> +#include <boot/coreboot_tables.h> +#include <arch/transition.h> +#include <armv8/arch/cpu.h> +#include <soc/clock.h> +#include <soc/cpu.h> +#include <soc/gpio.h> +#include <soc/i2c.h> +#include <soc/pinmux.h> +#include <soc/power.h> +#include <stdlib.h> +#include <symbols.h> + +/* Arbitrary range of DMA memory for depthcharge's drivers */ +#define DMA_START (0x77300000) +#define DMA_SIZE (0x00100000) + +extern void switch_el3_to_el2(void); + +/* this happens after cpu_init where exynos resources are set */ +static void mainboard_init(device_t dev) +{ + int mmc_index, mmc_ratio = 3; + + /* Sst GPIOs for SD and eMMC */ + exynos_pinmux_mmc0(); + exynos_pinmux_mmc2(); + + /* Set Clocks for SD & eMMC */ + mmc_index = 2; + set_mmc_clk(mmc_index, mmc_ratio); + mmc_index = 0; + set_mmc_clk(mmc_index, mmc_ratio); + + /* Load VBAR with PSCI SMC handler */ + raw_write_vbar_el3(readl(_esram - 0x10)); + + switch_el3_to_el2(); + printk(BIOS_INFO, "Switched to EL%d\n", get_current_el()); + + return; +} + +static void mainboard_enable(device_t dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .name = "Samsung Jazz", + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/samsung/jazz/memlayout.ld b/src/mainboard/samsung/jazz/memlayout.ld new file mode 100644 index 0000000..a309bd3 --- /dev/null +++ b/src/mainboard/samsung/jazz/memlayout.ld @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Samsung Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/samsung/exynos7/memlayout.ld> diff --git a/src/mainboard/samsung/jazz/romstage.c b/src/mainboard/samsung/jazz/romstage.c new file mode 100644 index 0000000..5142b25 --- /dev/null +++ b/src/mainboard/samsung/jazz/romstage.c @@ -0,0 +1,64 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Samsung Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <cbfs.h> +#include <cbmem.h> +#include <stdlib.h> +#include <types.h> +#include <string.h> + +#include <console/console.h> +#include <arch/cache.h> +#include <arch/exception.h> +#include <arch/stages.h> +#include <soc/clock.h> +#include <soc/cpu.h> +#include <soc/gpio.h> +#include <soc/i2c.h> +#include <soc/periph.h> +#include <soc/power.h> + +static int setup_power(void) +{ + return 0; +} + +void main(void) +{ + void *entry; + int power_init_failed = setup_power(); + +#if CONFIG_EARLY_CONSOLE + console_init(); +#endif + + if (power_init_failed) + die("Failed to intialize power.\n"); + +#if 0 + bl31_entrypoint(); + + /* + * For now, let's store PSCI handler address in memory somewhere + * because it's highly probable that by the time we are ready to + * switch the exception level vbar_el3 has already have overwritten + */ + writel((uint32_t) (uintptr_t) &runtime_exceptions, (_esram - 0x10)); +#endif + + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, CONFIG_CBFS_PREFIX "/ramstage"); + + stage_exit(entry); +}
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Stefan Reinauer