[S] Change in coreboot[main]: soc/mediatek/mt8196: Correct the region size for mcufw_reserved

[Jarried Lin (Code Review)]

Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86108?usp=email )

Change subject: soc/mediatek/mt8196: Correct the region size for mcufw_reserved
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soc/mediatek/mt8196: Correct the region size for mcufw_reserved

Adjust the allocated region size for mcufw_reserved from 52K to 68K.

TEST=Build pass.
BUG=b:390334489

Change-Id: I1c17c1492d5568f4d51ff45e1fb90e067eae5cb1
---
M src/soc/mediatek/mt8196/include/soc/memlayout.ld
1 file changed, 7 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/86108/1

diff --git a/src/soc/mediatek/mt8196/include/soc/memlayout.ld b/src/soc/mediatek/mt8196/include/soc/memlayout.ld
index 74f1543..158ddb8 100644
--- a/src/soc/mediatek/mt8196/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8196/include/soc/memlayout.ld
@@ -26,16 +26,16 @@
     * MCUPM exchanges data with kernel driver using SRAM 0x00113000 ~
     * 0x0011ffff. The address is hardcoded in MCUPM image.
     */
-	REGION(mcufw_reserved, 0x00113000, 52K, 4K)
+	REGION(mcufw_reserved, 0x00113000, 68K, 4K)
    /* End of regions that need to stay in SRAM. */
    /* Regions can be moved to SRAM_L2C. */
-	CBFS_MCACHE(0x00120000, 16k)
-	VBOOT2_WORK(0x00124000, 12K)
-	FMAP_CACHE(0x00127000, 2k)
-	TPM_LOG(0x00127800, 2k)
-	TIMESTAMP(0x00128000, 1k)
+	CBFS_MCACHE(0x00124000, 16k)
+	VBOOT2_WORK(0x00128000, 12K)
+	FMAP_CACHE(0x0012B000, 2k)
+	TPM_LOG(0x0012B800, 2k)
+	TIMESTAMP(0x0012C000, 1k)
    /* End of regions that can also be moved to SRAM_L2C. */
-	/* EMPTY(0x00128400, 95K) */
+	/* EMPTY(0x0012C400, 79K) */
    SRAM_END(0x00140000)

/*