Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
soc/amd/picasso/acpi: Set missing RTC offsets
The RTC Date Alarm and RTC AltCentury fields are supported on picasso.
These get consumed by the linux kernel: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/th...
The values are never actually used by the kernel though. So this is really a nop change.
BUG=b:160277722 TEST=Boot kernel and make sure suspend stress test works.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ie83d7e0a06107a6de095f3e4c521d91e90920c0b --- M src/soc/amd/picasso/acpi.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/44448/1
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 8062cfa..da6bc94 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -112,9 +112,9 @@ fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ - fadt->day_alrm = 0; /* 0x7d these have to be */ - fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ - fadt->century = 0; /* 0x7f to make rtc alarm work */ + fadt->day_alrm = 0x0d; + fadt->mon_alrm = 0; + fadt->century = 0x32; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */
Raul Rangel has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
soc/amd/picasso/acpi: Set missing RTC offsets
The RTC Date Alarm and RTC AltCentury fields are supported on picasso.
These get consumed by the linux kernel: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/th...
BUG=b:160277722 TEST=Boot kernel and make sure suspend stress test works.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ie83d7e0a06107a6de095f3e4c521d91e90920c0b --- M src/soc/amd/picasso/acpi.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/44448/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44448/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44448/2//COMMIT_MSG@15 PS2, Line 15: TEST=Boot kernel and make sure suspend stress test works. That means it did not work before?
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44448/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44448/2//COMMIT_MSG@15 PS2, Line 15: TEST=Boot kernel and make sure suspend stress test works.
That means it did not work before?
It was just flaky. I'm not sure if this patch fixes the flake. I haven't done extensive testing.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
Patch Set 2: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
Patch Set 2: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44448 )
Change subject: soc/amd/picasso/acpi: Set missing RTC offsets ......................................................................
soc/amd/picasso/acpi: Set missing RTC offsets
The RTC Date Alarm and RTC AltCentury fields are supported on picasso.
These get consumed by the linux kernel: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/th...
BUG=b:160277722 TEST=Boot kernel and make sure suspend stress test works.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ie83d7e0a06107a6de095f3e4c521d91e90920c0b Reviewed-on: https://review.coreboot.org/c/coreboot/+/44448 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/picasso/acpi.c 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 8062cfa..da6bc94 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -112,9 +112,9 @@ fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ - fadt->day_alrm = 0; /* 0x7d these have to be */ - fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ - fadt->century = 0; /* 0x7f to make rtc alarm work */ + fadt->day_alrm = 0x0d; + fadt->mon_alrm = 0; + fadt->century = 0x32; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */
-
Aaron Durbin (Code Review) -
Felix Held (Code Review)
-
Furquan Shaikh (Code Review)
-
Paul Menzel (Code Review)
-
Raul Rangel (Code Review)