Change in coreboot[master]: soc/intel/common: Add crashlog SRAM PCI device IDs for TGL-U/Y and ADL-P - coreboot-gerrit

28 Sep 2021


      Attention is currently required from: Tim Wawrzynczak.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57787 )
Change subject: soc/intel/common: Add crashlog SRAM PCI device IDs for TGL-U/Y and ADL-P
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Patch Set 2: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I64b58b8c345bd54774c4dab7b65258714cd8dc9e
Gerrit-Change-Number: 57787
Gerrit-PatchSet: 2
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Paul Menzel paulepanter@mailbox.org
Gerrit-Attention: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Comment-Date: Tue, 28 Sep 2021 23:21:25 +0000
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