Change in coreboot[master]: configs: add sercon port and disable pxe serial console for apu{2, 3, 4, 5}
Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/28616 )
Change subject: configs: add sercon port and disable pxe serial console for apu{2,3,4,5} ......................................................................
configs: add sercon port and disable pxe serial console for apu{2,3,4,5}
To avoid mangled characters on serial output from iPXE we have to disable serial from iPXE console. More to that to have correct serial input we have to enable SeaBIOS SERCON option with default configuration.
The only limitation of this configs is that apu5 doesn't detect iPXE - that platform is not for public use so it doesn't affect anyone.
Change-Id: I124705bd691b3c8dcd9a2636b17c019d02732c5a Signed-off-by: Piotr Król piotr.krol@3mdeb.com Reviewed-on: https://review.coreboot.org/28616 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- A configs/config.pcengines_apu1 M configs/config.pcengines_apu2 A configs/config.pcengines_apu3 A configs/config.pcengines_apu4 A configs/config.pcengines_apu5 5 files changed, 48 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/configs/config.pcengines_apu1 b/configs/config.pcengines_apu1 new file mode 100644 index 0000000..e511d65 --- /dev/null +++ b/configs/config.pcengines_apu1 @@ -0,0 +1,10 @@ +# CONFIG_COLLECT_TIMESTAMPS is not set +CONFIG_VENDOR_PCENGINES=y +CONFIG_BOARD_PCENGINES_APU1=y +CONFIG_NO_GFX_INIT=y +CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y +CONFIG_PXE=y +CONFIG_BUILD_IPXE=y +CONFIG_PXE_ROM_ID="10ec,8168" +# CONFIG_PXE_SERIAL_CONSOLE is not set +CONFIG_MEMTEST_SECONDARY_PAYLOAD=y diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 index 2754024..08d4d4e 100644 --- a/configs/config.pcengines_apu2 +++ b/configs/config.pcengines_apu2 @@ -4,7 +4,9 @@ CONFIG_APU2_PINMUX_UART_C=y CONFIG_APU2_PINMUX_UART_D=y CONFIG_NO_GFX_INIT=y +CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y CONFIG_PXE=y CONFIG_BUILD_IPXE=y CONFIG_PXE_ROM_ID="8086,157b" +# CONFIG_PXE_SERIAL_CONSOLE is not set CONFIG_MEMTEST_SECONDARY_PAYLOAD=y diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 new file mode 100644 index 0000000..7acf014 --- /dev/null +++ b/configs/config.pcengines_apu3 @@ -0,0 +1,12 @@ +# CONFIG_COLLECT_TIMESTAMPS is not set +CONFIG_VENDOR_PCENGINES=y +CONFIG_BOARD_PCENGINES_APU3=y +CONFIG_APU2_PINMUX_UART_C=y +CONFIG_APU2_PINMUX_UART_D=y +CONFIG_NO_GFX_INIT=y +CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y +CONFIG_PXE=y +CONFIG_BUILD_IPXE=y +CONFIG_PXE_ROM_ID="8086,1539" +# CONFIG_PXE_SERIAL_CONSOLE is not set +CONFIG_MEMTEST_SECONDARY_PAYLOAD=y diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 new file mode 100644 index 0000000..9e7ca5a --- /dev/null +++ b/configs/config.pcengines_apu4 @@ -0,0 +1,12 @@ +# CONFIG_COLLECT_TIMESTAMPS is not set +CONFIG_VENDOR_PCENGINES=y +CONFIG_BOARD_PCENGINES_APU4=y +CONFIG_APU2_PINMUX_UART_C=y +CONFIG_APU2_PINMUX_UART_D=y +CONFIG_NO_GFX_INIT=y +CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y +CONFIG_PXE=y +CONFIG_BUILD_IPXE=y +CONFIG_PXE_ROM_ID="8086,1539" +# CONFIG_PXE_SERIAL_CONSOLE is not set +CONFIG_MEMTEST_SECONDARY_PAYLOAD=y diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 new file mode 100644 index 0000000..e5ddcee --- /dev/null +++ b/configs/config.pcengines_apu5 @@ -0,0 +1,12 @@ +# CONFIG_COLLECT_TIMESTAMPS is not set +CONFIG_VENDOR_PCENGINES=y +CONFIG_BOARD_PCENGINES_APU5=y +CONFIG_APU2_PINMUX_UART_C=y +CONFIG_APU2_PINMUX_UART_D=y +CONFIG_NO_GFX_INIT=y +CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y +CONFIG_PXE=y +CONFIG_BUILD_IPXE=y +CONFIG_PXE_ROM_ID="8086,1539" +# CONFIG_PXE_SERIAL_CONSOLE is not set +CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
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Philipp Deppenwiese (Code Review)