Change in coreboot[master]: soc/intel/elkhartlake: Introduce Intel PSE

[Werner Zeh (Code Review)]

Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Mario Scheithauer, Angel Pons, Subrata Banik, Lean Sheng Tan, Patrick Rudolph, Felix Held.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 )

Change subject: soc/intel/elkhartlake: Introduce Intel PSE
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Patch Set 47:

(1 comment)

File src/soc/intel/elkhartlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/55367/comment/de4ff227_14201b2c 
PS47, Line 211: config PSE_FW_FILE_SIZE
              : 	hex "Memory buffer (KiB) for PSE FW image"
              : 	default 0x200
              : 	help
              : 	  It is recommended to allocate at least 512 KiB for PSE FW
              : 
              : config PSE_CONFIG_BUFFER_SIZE
              : 	hex "Memory buffer (KiB) for PSE config data"
              : 	default 0x100
              : 	help
              : 	  It is recommended to allocate at least 256 KiB for PSE config
              : 	  data (FSP will append PSE config data to memory region right
              : 	  after PSE FW memory region)
Make these dependent on "PSE_IMAGE so that they disappear if the PSE is disabled.