Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32734 )
Change subject: mb/supermicro/x11ssh: Add Supermicro X11SSH-TF ......................................................................
Patch Set 78:
(7 comments)
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11ssh/ramstage.c:
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 3: *
copyright?
Copyright holders will be transferred to AUTHORS file soon.
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11ssh/romstage.c:
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 3: *
copyright?
Same.
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... File src/mainboard/supermicro/x11ssh/variants/tf/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 30: "Device4Enable" = "1"
I guess this was copied from some Intel or Google board... […]
Done
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 73: register "SsicPortEnable" = "0"
doesn't this effectively disable usb3. […]
No.
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 219: device pci 00.0 on end # Aspeed 2400 VGA
Are the two nested instances of "device pci 00. […]
Yes
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 263: device pnp 2e.b on # SUART3
Right, then I wonder if SUART3 and SUART4 are actually used for anything.
It's a virtual UART, we can't check this. Maybe it is for SOL.
https://review.coreboot.org/c/coreboot/+/32734/74/src/mainboard/supermicro/x... PS74, Line 267: device pnp 2e.c on # SUART4
... […]
Same.
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Felix Singer (Code Review)