Change in coreboot[master]: [WIP]nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/27984
Change subject: [WIP]nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled ......................................................................
[WIP]nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled
writes to VGA MEM and IO by NGI are invalid if the IGD is not decoding them.
Change-Id: I4b9329d14105eb563a0d4aea6ef75ff11febf6df Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/gm45/gma.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/i945/gma.c M src/northbridge/intel/pineview/gma.c M src/northbridge/intel/sandybridge/gma.c M src/northbridge/intel/x4x/gma.c 6 files changed, 81 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/27984/1
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 606170c..1316fad 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -771,11 +771,18 @@ /* Post VBIOS init */ gma_pm_init_post_vbios(dev, edid_lvds.ascii_string);
- if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { - gma_ngi(dev, &edid_lvds); - } else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { - int lightup_ok; - gma_gfxinit(&lightup_ok); + int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; + + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); + } else { + if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { + gma_ngi(dev, &edid_lvds); + } else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { + int lightup_ok; + gma_gfxinit(&lightup_ok); + } }
intel_gma_restore_opregion(); diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 8ffdce8..8f60da4 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -468,10 +468,17 @@ /* Pre panel init */ gma_setup_panel(dev);
+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; + if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { - printk(BIOS_SPEW, "NATIVE graphics, run native enable\n"); - gma_gfxinit(&lightup_ok); - gfx_set_init_done(1); + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); + } else { + printk(BIOS_SPEW, "NATIVE graphics, run native enable\n"); + gma_gfxinit(&lightup_ok); + gfx_set_init_done(1); + } }
if (! lightup_ok) { diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 6c3d6ae..83dc42e 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -700,12 +700,20 @@ pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; + if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) { - if (acpi_is_wakeup_s3()) + if (acpi_is_wakeup_s3()) { printk(BIOS_INFO, "Skipping native VGA initialization when resuming from ACPI S3.\n"); - else - gma_ngi(dev); + } else { + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); + } else { + gma_ngi(dev); + } + } } else { /* PCI Init, will run VBIOS */ pci_dev_init(dev); diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c index 8cf4d22..02100e9 100644 --- a/src/northbridge/intel/pineview/gma.c +++ b/src/northbridge/intel/pineview/gma.c @@ -275,6 +275,8 @@ struct resource *pio_res; struct northbridge_intel_pineview_config *conf = dev->chip_info;
+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; + /* Find base addresses */ mmio_res = find_resource(dev, 0x10); gtt_res = find_resource(dev, 0x1c); @@ -282,11 +284,17 @@ physbase = pci_read_config32(dev, 0x5c) & ~0xf;
if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base) { - printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n", - mmio_res->base); - intel_gma_init(conf, dev, res2mmio(mmio_res, 0, 0), - res2mmio(gtt_res, 0, 0), - physbase, pio_res->base); + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); + } else { + printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n", + mmio_res->base); + intel_gma_init(conf, dev, + res2mmio(mmio_res, 0, 0), + res2mmio(gtt_res, 0, 0), + physbase, pio_res->base); + } }
/* Linux relies on VBT for panel info. */ diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 73546ce..042c2a9 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -631,29 +631,38 @@ /* Post VBIOS init */ gma_pm_init_post_vbios(dev);
+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; + /* Running graphics init on S3 breaks Linux drm driver. */ if (!acpi_is_wakeup_s3() && (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) || IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT))) { - /* This should probably run before post VBIOS init. */ - printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); - u8 *mmiobase; - u32 iobase, physbase, graphics_base; - struct northbridge_intel_sandybridge_config *conf = dev->chip_info; - iobase = dev->resource_list[2].base; - mmiobase = res2mmio(&dev->resource_list[0], 0, 0); - physbase = pci_read_config32(dev, 0x5c) & ~0xf; - graphics_base = dev->resource_list[1].base; - - int lightup_ok; - if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { - gma_gfxinit(&lightup_ok); + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); } else { - lightup_ok = i915lightup_sandy(&conf->gfx, physbase, - iobase, mmiobase, graphics_base); + /* This should probably run before post VBIOS init. */ + printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); + u8 *mmiobase; + u32 iobase, physbase, graphics_base; + struct northbridge_intel_sandybridge_config *conf = dev->chip_info; + iobase = dev->resource_list[2].base; + mmiobase = res2mmio(&dev->resource_list[0], 0, 0); + physbase = pci_read_config32(dev, 0x5c) & ~0xf; + graphics_base = dev->resource_list[1].base; + + int lightup_ok; + if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { + gma_gfxinit(&lightup_ok); + } else { + lightup_ok = i915lightup_sandy(&conf->gfx, + physbase, + iobase, mmiobase, + graphics_base); + } + if (lightup_ok) + gfx_set_init_done(1); } - if (lightup_ok) - gfx_set_init_done(1); }
gma_enable_swsci(); diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index 2d2feee..d0c40b1 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -60,7 +60,7 @@
static void gma_func0_init(struct device *dev) { - u16 reg16, ggc; + u16 reg16; u32 reg32;
/* IGD needs to be Bus Master */ @@ -74,11 +74,16 @@ reg16 |= 0xbc; pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc, reg16);
- ggc = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_GGC); + int vga_disable = pci_read_config16(dev, D0F0_GGC);
if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { - int lightup_ok; - gma_gfxinit(&lightup_ok); + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); + } else { + int lightup_ok; + gma_gfxinit(&lightup_ok); + } } else { pci_dev_init(dev); }
-
Arthur Heymans (Code Review)