Stefan Reinauer has uploaded this change for review. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Add compatibility mode
Add a compatibility mode to the em100 tool. Right now coreboot and the Chrome OS build system carry a bunch of work-arounds to produce two sets of images, one for "real SPI chips" and one for use with the EM100Pro. Instead, we can (and should) just recognize these images and have the em100 tool handle them correctly during upload. em100 --compatibility ... does exactly that.
Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org Change-Id: Ie02264facb028841d18ed84680ffa40f45987510 --- M Makefile M em100.c M em100.h A ifd.h A image.c 5 files changed, 251 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/58/37258/1
diff --git a/Makefile b/Makefile index 0b7c217..3bdb103 100644 --- a/Makefile +++ b/Makefile @@ -40,7 +40,7 @@
XZ = xz/xz_crc32.c xz/xz_crc64.c xz/xz_dec_bcj.c xz/xz_dec_lzma2.c xz/xz_dec_stream.c SOURCES = em100.c firmware.c fpga.c hexdump.c sdram.c spi.c system.c trace.c usb.c -SOURCES += curl.c chips.c tar.c $(XZ) +SOURCES += image.c curl.c chips.c tar.c $(XZ) OBJECTS = $(SOURCES:.c=.o)
all: dep em100 diff --git a/em100.c b/em100.c index e52222b..abd8415 100644 --- a/em100.c +++ b/em100.c @@ -758,7 +758,8 @@ {"device", 1, 0, 'x'}, {"list-devices", 0, 0, 'l'}, {"update-files", 0, 0, 'U'}, - {"terminal",0 ,0, 'T'}, + {"terminal", 0, 0, 'T'}, + {"compatible", 0, 0, 'C'}, {NULL, 0, 0, 0} };
@@ -787,6 +788,7 @@ " -x|--device EMxxxxxx use EM100pro with serial no EMxxxxxx\n" " -l|--list-devices list all connected EM100pro devices\n" " -U|--update-files update device (chip) and firmware database\n" + " -C|--compatible enable compatibility mode (patch image for EM100Pro)\n" " -D|--debug: print debug information.\n" " -h|--help: this help text\n\n", name); @@ -802,7 +804,7 @@ const char *holdpin = NULL; int do_start = 0, do_stop = 0; int verify = 0, trace = 0, terminal=0; - int debug = 0; + int debug = 0, compatibility = 0; int bus = 0, device = 0; int firmware_is_dpfw = 0; unsigned int serial_number = 0; @@ -810,7 +812,7 @@ unsigned int spi_start_address = 0; const char *voltage = NULL;
- while ((opt = getopt_long(argc, argv, "c:d:a:u:rsvtO:F:f:g:S:V:p:Dx:lUhT", + while ((opt = getopt_long(argc, argv, "c:d:a:u:rsvtO:F:f:g:S:V:p:DCx:lUhT", longopts, &idx)) != -1) { switch (opt) { case 'c': @@ -881,6 +883,9 @@ case 'U': update_all_files(); return 0; + case 'C': + compatibility = 1; + break; default: case 'h': usage(argv[0]); @@ -1074,6 +1079,9 @@ return 1; }
+ if (compatibility) + autocorrect_image(&em100, data, length); + if (spi_start_address) { readback = malloc(maxlen); if (readback == NULL) { diff --git a/em100.h b/em100.h index f0bacf2..448e6bb 100644 --- a/em100.h +++ b/em100.h @@ -196,9 +196,13 @@
#define MB * 1024 * 1024 #define FILENAME_BUFFER_SIZE 1024 +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) char *get_em100_file(const char *name);
/* Chips */ int parse_dcfg(chipdesc *chip, TFILE *dcfg);
+/* Images */ +int autocorrect_image(struct em100 *em100, char *image, size_t size); + #endif diff --git a/ifd.h b/ifd.h new file mode 100644 index 0000000..dac4edb --- /dev/null +++ b/ifd.h @@ -0,0 +1,50 @@ +/* + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +enum ifd_version { + IFD_VERSION_1, + IFD_VERSION_2, +}; + +enum platform { + PLATFORM_APL, + PLATFORM_CNL, + PLATFORM_GLK, + PLATFORM_ICL, + PLATFORM_SKLKBL, + PLATFORM_TGL, +}; + +enum spi_frequency { + SPI_FREQUENCY_20MHZ = 0, + SPI_FREQUENCY_33MHZ = 1, + SPI_FREQUENCY_48MHZ = 2, + SPI_FREQUENCY_50MHZ_30MHZ = 4, + SPI_FREQUENCY_17MHZ = 6, +}; + +/* flash descriptor */ +typedef struct { + uint32_t flvalsig; + uint32_t flmap0; + uint32_t flmap1; + uint32_t flmap2; +} __attribute__((packed)) fdbar_t; + +/* component section */ +typedef struct { + uint32_t flcomp; + uint32_t flill; + uint32_t flpb; +} __attribute__((packed)) fcba_t; + diff --git a/image.c b/image.c new file mode 100644 index 0000000..138436b --- /dev/null +++ b/image.c @@ -0,0 +1,185 @@ +/* + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdio.h> +#include <stdlib.h> +#include <stdint.h> +#include "em100.h" +#include "ifd.h" + +/** + * PTR_IN_RANGE - examine whether a pointer falls in [base, base + limit) + * @param ptr: the non-void* pointer to a single arbitrary-sized object. + * @param base: base address represented with char* type. + * @param limit: upper limit of the legal address. + * + */ +#define PTR_IN_RANGE(ptr, base, limit) \ + ((const char *)(ptr) >= (base) && \ + (const char *)&(ptr)[1] <= (base) + (limit)) + +static int ifd_version; +static int platform = -1; + +static fdbar_t *find_fd(char *image, int size) +{ + int i, found = 0; + + /* Scan for FD signature */ + for (i = 0; i < (size - 4); i += 4) { + if (*(uint32_t *) (image + i) == 0x0FF0A55A) { + found = 1; + break; // signature found. + } + } + + if (!found) { + printf("No Flash Descriptor found in this image\n"); + return NULL; + } + + fdbar_t *fdb = (fdbar_t *) (image + i); + return PTR_IN_RANGE(fdb, image, size) ? fdb : NULL; +} + +static fcba_t *find_fcba(char *image, int size) +{ + fdbar_t *fdb = find_fd(image, size); + if (!fdb) + return NULL; + fcba_t *fcba = (fcba_t *) (image + ((fdb->flmap0 & 0xff) << 4)); + return PTR_IN_RANGE(fcba, image, size) ? fcba : NULL; + +} + +/* + * Some newer platforms have re-defined the FCBA field that was used to + * distinguish IFD v1 v/s v2. Define a list of platforms that we know do not + * have the required FCBA field, but are IFD v2 and return true if current + * platform is one of them. + */ +static int is_platform_ifd_2(void) +{ + static const int ifd_2_platforms[] = { + PLATFORM_GLK, + PLATFORM_CNL, + PLATFORM_ICL, + PLATFORM_TGL, + }; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(ifd_2_platforms); i++) { + if (platform == ifd_2_platforms[i]) + return 1; + } + + return 0; +} + +/* + * There is no version field in the descriptor so to determine + * if this is a new descriptor format we check the hardcoded SPI + * read frequency to see if it is fixed at 20MHz or 17MHz. + */ +static int get_ifd_version_from_fcba(char *image, int size) +{ + int read_freq; + const fcba_t *fcba = find_fcba(image, size); + const fdbar_t *fdb = find_fd(image, size); + if (!fcba || !fdb) + exit(EXIT_FAILURE); + + read_freq = (fcba->flcomp >> 17) & 7; + + switch (read_freq) { + case SPI_FREQUENCY_20MHZ: + return IFD_VERSION_1; + case SPI_FREQUENCY_17MHZ: + case SPI_FREQUENCY_50MHZ_30MHZ: + return IFD_VERSION_2; + default: + fprintf(stderr, "Unknown descriptor version: %d\n", + read_freq); + exit(EXIT_FAILURE); + } +} + +static void check_ifd_version(char *image, int size) +{ + if (is_platform_ifd_2()) + ifd_version = IFD_VERSION_2; + else + ifd_version = get_ifd_version_from_fcba(image, size); +} + +static void set_spi_frequency(char *image, int size, enum spi_frequency freq) +{ + fcba_t *fcba = find_fcba(image, size); + if (!fcba) + exit(EXIT_FAILURE); + + /* clear bits 21-29 */ + fcba->flcomp &= ~0x3fe00000; + /* Read ID and Read Status Clock Frequency */ + fcba->flcomp |= freq << 27; + /* Write and Erase Clock Frequency */ + fcba->flcomp |= freq << 24; + /* Fast Read Clock Frequency */ + fcba->flcomp |= freq << 21; +} + +static void set_em100_mode(struct em100 *em100, char *image, int size) +{ + fcba_t *fcba = find_fcba(image, size); + if (!fcba) + exit(EXIT_FAILURE); + + int freq; + + if (em100->hwversion == 6) { + printf("EM100Pro-G2 can run at full speed.\n"); + return; + } + + switch (ifd_version) { + case IFD_VERSION_1: + freq = SPI_FREQUENCY_20MHZ; + break; + case IFD_VERSION_2: + freq = SPI_FREQUENCY_17MHZ; + break; + default: + freq = SPI_FREQUENCY_17MHZ; + break; + } + + fcba->flcomp &= ~(1 << 30); + set_spi_frequency(image, size, freq); +} + +int autocorrect_image(struct em100 *em100, char *image, size_t size) +{ + printf("Auto-detecting IFD image ... "); + if (find_fd(image, size)) + printf("OK\n"); + else + return 1; /* No support for other image types (yet). */ + + /* Auto-detect IFD version */ + check_ifd_version(image, size); + + /* Set EM100 mode */ + set_em100_mode(em100, image, size); + + return 0; +}
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 1: Code-Review+1
(4 comments)
just suggestions
https://review.coreboot.org/c/em100/+/37258/1/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/1/image.c@97 PS1, Line 97: const fcba_t *fcba = find_fcba(image, size); : const fdbar_t *fdb = find_fd(image, size); Should these two be cached? They're looked up a couple of times
https://review.coreboot.org/c/em100/+/37258/1/image.c@120 PS1, Line 120: ifd_version maybe return instead of using a global?
https://review.coreboot.org/c/em100/+/37258/1/image.c@125 PS1, Line 125: set_spi_frequency prefix with ifd_ to make clear that it's ifd specific?
https://review.coreboot.org/c/em100/+/37258/1/image.c@141 PS1, Line 141: set_em100_mode ditto
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/em100/+/37258/1/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/1/image.c@120 PS1, Line 120: ifd_version
maybe return instead of using a global?
Done
https://review.coreboot.org/c/em100/+/37258/1/image.c@125 PS1, Line 125: set_spi_frequency
prefix with ifd_ to make clear that it's ifd specific?
Done
https://review.coreboot.org/c/em100/+/37258/1/image.c@141 PS1, Line 141: set_em100_mode
ditto
Done
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/em100/+/37258
to look at the new patch set (#2).
Change subject: Add compatibility mode ......................................................................
Add compatibility mode
Add a compatibility mode to the em100 tool. Right now coreboot and the Chrome OS build system carry a bunch of work-arounds to produce two sets of images, one for "real SPI chips" and one for use with the EM100Pro. Instead, we can (and should) just recognize these images and have the em100 tool handle them correctly during upload. em100 --compatibility ... does exactly that.
Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org Change-Id: Ie02264facb028841d18ed84680ffa40f45987510 --- M Makefile M em100.c M em100.h A image.c 4 files changed, 223 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/58/37258/2
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/em100/+/37258
to look at the new patch set (#3).
Change subject: Add compatibility mode ......................................................................
Add compatibility mode
Add a compatibility mode to the em100 tool. Right now coreboot and the Chrome OS build system carry a bunch of work-arounds to produce two sets of images, one for "real SPI chips" and one for use with the EM100Pro. Instead, we can (and should) just recognize these images and have the em100 tool handle them correctly during upload. em100 --compatibility ... does exactly that.
Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org Change-Id: Ie02264facb028841d18ed84680ffa40f45987510 --- M Makefile M em100.c M em100.h A image.c 4 files changed, 228 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/58/37258/3
Mathew King has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 3:
(4 comments)
I really like this change, it should make working with an EM100 much easier.
https://review.coreboot.org/c/em100/+/37258/3/em100.h File em100.h:
https://review.coreboot.org/c/em100/+/37258/3/em100.h@202 PS3, Line 202: int What does the return value here mean?
https://review.coreboot.org/c/em100/+/37258/3/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/3/image.c@26 PS3, Line 26: #define PTR_IN_RANGE(ptr, base, limit) \ : ((const char *)(ptr) >= (base) && \ : (const char *)&(ptr)[1] <= (base) + (limit)) This is only ever used like PTR_IN_RANGE(...) ? ... : NULL. It might be nice to incorporate that into the macro. I see that this is copied from ifdtool.c and it looks like it may be useful there too.
https://review.coreboot.org/c/em100/+/37258/3/image.c@75 PS3, Line 75: 0x0FF0A55A Maybe define this somewhere?
https://review.coreboot.org/c/em100/+/37258/3/image.c@102 PS3, Line 102: is_platform_ifd_2(void) Maybe just pass in a platform id here to avoid the static platform variable that is not being assigned to anything currently.
Simon Glass has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 3:
(9 comments)
https://review.coreboot.org/c/em100/+/37258/3/em100.h File em100.h:
https://review.coreboot.org/c/em100/+/37258/3/em100.h@202 PS3, Line 202: autocorrect_image Can you add a comment as to what this does?
https://review.coreboot.org/c/em100/+/37258/3/em100.c File em100.c:
https://review.coreboot.org/c/em100/+/37258/3/em100.c@787 PS3, Line 787: C don't want to use -e ?
https://review.coreboot.org/c/em100/+/37258/3/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/3/image.c@26 PS3, Line 26: PTR_IN_RANGE Seems like this could be a function
https://review.coreboot.org/c/em100/+/37258/3/image.c@30 PS3, Line 30: platform Where is this set?
https://review.coreboot.org/c/em100/+/37258/3/image.c@69 PS3, Line 69: find_fd Could use function comments throughout
https://review.coreboot.org/c/em100/+/37258/3/image.c@92 PS3, Line 92: 0xff) << 4 Lots of magic shifts and values in this file...could we define these values, or is it not worth it?
https://review.coreboot.org/c/em100/+/37258/3/image.c@168 PS3, Line 168: 6 This should be up to the user though, and the user has requested a change. Perhaps just show a warning but continue makingg the changes?
https://review.coreboot.org/c/em100/+/37258/3/image.c@187 PS3, Line 187: fcba->flcomp &= ~(1 << 30); Seems like this line should move into ifd_set_spi_frequency()
https://review.coreboot.org/c/em100/+/37258/3/image.c@205 PS3, Line 205: ifd_set_em100_mode Print a message to indicate what happened?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 3:
(1 comment)
I'm not sure about duplicating what ifdtool can do already
https://review.coreboot.org/c/em100/+/37258/3/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/3/image.c@102 PS3, Line 102: is_platform_ifd_2(void)
Maybe just pass in a platform id here to avoid the static platform variable that is not being assign […]
I'd rather move this logic into `get_ifd_version`
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 3:
Patch Set 3:
(1 comment)
I'm not sure about duplicating what ifdtool can do already
Yeah, the functionality does not make a whole lot of sense in ifdtool, as this requires manual interaction and additional build steps for every build you are going to use with the em100 tool, when the tool itself can do the job. This saves a bunch of workarounds in our firmware builds for us.
Hello Simon Glass, Angel Pons, Mathew King, David Hendricks, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/em100/+/37258
to look at the new patch set (#4).
Change subject: Add compatibility mode ......................................................................
Add compatibility mode
Add a compatibility mode to the em100 tool. Right now coreboot and the Chrome OS build system carry a bunch of work-arounds to produce two sets of images, one for "real SPI chips" and one for use with the EM100Pro. Instead, we can (and should) just recognize these images and have the em100 tool handle them correctly during upload. em100 --compatibility ... does exactly that.
Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org Change-Id: Ie02264facb028841d18ed84680ffa40f45987510 --- M Makefile M em100.c M em100.h A image.c 4 files changed, 244 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/58/37258/4
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 4:
(13 comments)
https://review.coreboot.org/c/em100/+/37258/3/em100.h File em100.h:
https://review.coreboot.org/c/em100/+/37258/3/em100.h@202 PS3, Line 202: autocorrect_image
Can you add a comment as to what this does?
Done
https://review.coreboot.org/c/em100/+/37258/3/em100.h@202 PS3, Line 202: int
What does the return value here mean?
Done
https://review.coreboot.org/c/em100/+/37258/3/em100.c File em100.c:
https://review.coreboot.org/c/em100/+/37258/3/em100.c@787 PS3, Line 787: C
don't want to use -e ?
for ... ?
I'm not opposed to change this, but what was your rationale?
https://review.coreboot.org/c/em100/+/37258/3/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/3/image.c@26 PS3, Line 26: PTR_IN_RANGE
Seems like this could be a function
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@26 PS3, Line 26: #define PTR_IN_RANGE(ptr, base, limit) \ : ((const char *)(ptr) >= (base) && \ : (const char *)&(ptr)[1] <= (base) + (limit))
This is only ever used like PTR_IN_RANGE(...) ? ... : NULL. […]
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@30 PS3, Line 30: platform
Where is this set?
Right now it is not. Removed.
https://review.coreboot.org/c/em100/+/37258/3/image.c@69 PS3, Line 69: find_fd
Could use function comments throughout
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@75 PS3, Line 75: 0x0FF0A55A
Maybe define this somewhere?
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@92 PS3, Line 92: 0xff) << 4
Lots of magic shifts and values in this file... […]
It seems the functions are somewhat self-explanatory, given the only thing they do is extract the function pointers from the image. I suppose I could change them to FLMAP0_FCBA_OFFSET and _MASK but I don't see how that would increase readability of this code, making it 3 lines instead of one.
https://review.coreboot.org/c/em100/+/37258/3/image.c@102 PS3, Line 102: is_platform_ifd_2(void)
I'd rather move this logic into `get_ifd_version`
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@168 PS3, Line 168: 6
This should be up to the user though, and the user has requested a change. […]
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@187 PS3, Line 187: fcba->flcomp &= ~(1 << 30);
Seems like this line should move into ifd_set_spi_frequency()
Done
https://review.coreboot.org/c/em100/+/37258/3/image.c@205 PS3, Line 205: ifd_set_em100_mode
Print a message to indicate what happened?
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 4:
Patch Set 3:
Patch Set 3:
(1 comment)
I'm not sure about duplicating what ifdtool can do already
Yeah, the functionality does not make a whole lot of sense in ifdtool, as this requires manual interaction and additional build steps for every build you are going to use with the em100 tool, when the tool itself can do the job. This saves a bunch of workarounds in our firmware builds for us.
Ack, makes sense to integrate it here then.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 4: Code-Review+1
(2 comments)
https://review.coreboot.org/c/em100/+/37258/3/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/3/image.c@92 PS3, Line 92: 0xff) << 4
It seems the functions are somewhat self-explanatory, given the only thing they do is extract the fu […]
I think the comment added on the last patchset is good enough
https://review.coreboot.org/c/em100/+/37258/4/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/4/image.c@182 PS4, Line 182: 17MHz 20MHz?
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/em100/+/37258/3/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/3/image.c@92 PS3, Line 92: 0xff) << 4
I think the comment added on the last patchset is good enough
Ack
Simon Glass has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 4: Code-Review+1
Hello Simon Glass, Angel Pons, Mathew King, David Hendricks, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/em100/+/37258
to look at the new patch set (#5).
Change subject: Add compatibility mode ......................................................................
Add compatibility mode
Add a compatibility mode to the em100 tool. Right now coreboot and the Chrome OS build system carry a bunch of work-arounds to produce two sets of images, one for "real SPI chips" and one for use with the EM100Pro. Instead, we can (and should) just recognize these images and have the em100 tool handle them correctly during upload. em100 --compatibility ... does exactly that.
Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org Change-Id: Ie02264facb028841d18ed84680ffa40f45987510 --- M Makefile M em100.c M em100.h A image.c 4 files changed, 244 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/58/37258/5
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/em100/+/37258/4/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/4/image.c@182 PS4, Line 182: 17MHz
20MHz?
Haha thank you!
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/em100/+/37258/4/image.c File image.c:
https://review.coreboot.org/c/em100/+/37258/4/image.c@182 PS4, Line 182: 17MHz
Haha thank you!
Done
Simon Glass has posted comments on this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Patch Set 5: Code-Review+2
Looks like I can +2 with my google.com email...not sure if that is intended?
Stefan Reinauer has submitted this change. ( https://review.coreboot.org/c/em100/+/37258 )
Change subject: Add compatibility mode ......................................................................
Add compatibility mode
Add a compatibility mode to the em100 tool. Right now coreboot and the Chrome OS build system carry a bunch of work-arounds to produce two sets of images, one for "real SPI chips" and one for use with the EM100Pro. Instead, we can (and should) just recognize these images and have the em100 tool handle them correctly during upload. em100 --compatibility ... does exactly that.
Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org Change-Id: Ie02264facb028841d18ed84680ffa40f45987510 Reviewed-on: https://review.coreboot.org/c/em100/+/37258 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Simon Glass sjg@chromium.org --- M Makefile M em100.c M em100.h A image.c 4 files changed, 244 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Simon Glass: Looks good to me, approved
diff --git a/Makefile b/Makefile index 8d8be29..93a2474 100644 --- a/Makefile +++ b/Makefile @@ -36,7 +36,7 @@
XZ = xz/xz_crc32.c xz/xz_crc64.c xz/xz_dec_bcj.c xz/xz_dec_lzma2.c xz/xz_dec_stream.c SOURCES = em100.c firmware.c fpga.c hexdump.c sdram.c spi.c system.c trace.c usb.c -SOURCES += curl.c chips.c tar.c $(XZ) +SOURCES += image.c curl.c chips.c tar.c $(XZ) OBJECTS = $(SOURCES:.c=.o)
all: dep em100 diff --git a/em100.c b/em100.c index 5fa95dd..7b1e068 100644 --- a/em100.c +++ b/em100.c @@ -764,7 +764,8 @@ {"device", 1, 0, 'x'}, {"list-devices", 0, 0, 'l'}, {"update-files", 0, 0, 'U'}, - {"terminal",0 ,0, 'T'}, + {"terminal", 0, 0, 'T'}, + {"compatible", 0, 0, 'C'}, {NULL, 0, 0, 0} };
@@ -793,6 +794,7 @@ " -x|--device EMxxxxxx use EM100pro with serial no EMxxxxxx\n" " -l|--list-devices list all connected EM100pro devices\n" " -U|--update-files update device (chip) and firmware database\n" + " -C|--compatible enable compatibility mode (patch image for EM100Pro)\n" " -D|--debug: print debug information.\n" " -h|--help: this help text\n\n", name); @@ -808,7 +810,7 @@ const char *holdpin = NULL; int do_start = 0, do_stop = 0; int verify = 0, trace = 0, terminal=0; - int debug = 0; + int debug = 0, compatibility = 0; int bus = 0, device = 0; int firmware_is_dpfw = 0; unsigned int serial_number = 0; @@ -816,7 +818,7 @@ unsigned int spi_start_address = 0; const char *voltage = NULL;
- while ((opt = getopt_long(argc, argv, "c:d:a:u:rsvtO:F:f:g:S:V:p:Dx:lUhT", + while ((opt = getopt_long(argc, argv, "c:d:a:u:rsvtO:F:f:g:S:V:p:DCx:lUhT", longopts, &idx)) != -1) { switch (opt) { case 'c': @@ -887,6 +889,9 @@ case 'U': update_all_files(); return 0; + case 'C': + compatibility = 1; + break; default: case 'h': usage(argv[0]); @@ -1081,6 +1086,9 @@ return 1; }
+ if (compatibility) + autocorrect_image(&em100, data, length); + if (spi_start_address) { readback = malloc(maxlen); if (readback == NULL) { diff --git a/em100.h b/em100.h index 4e3d74c..d48e52b 100644 --- a/em100.h +++ b/em100.h @@ -193,9 +193,13 @@
#define MB * 1024 * 1024 #define FILENAME_BUFFER_SIZE 1024 +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) char *get_em100_file(const char *name);
/* Chips */ int parse_dcfg(chipdesc *chip, TFILE *dcfg);
+/* Images */ +int autocorrect_image(struct em100 *em100, char *image, size_t size); + #endif diff --git a/image.c b/image.c new file mode 100644 index 0000000..9e0b8a7 --- /dev/null +++ b/image.c @@ -0,0 +1,228 @@ +/* + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdio.h> +#include <stdlib.h> +#include <stdint.h> +#include "em100.h" + +enum ifd_version { + IFD_VERSION_1, + IFD_VERSION_2, +}; + +enum platform { + PLATFORM_APL, + PLATFORM_CNL, + PLATFORM_GLK, + PLATFORM_ICL, + PLATFORM_SKLKBL, + PLATFORM_TGL, +}; + +enum spi_frequency { + SPI_FREQUENCY_20MHZ = 0, + SPI_FREQUENCY_33MHZ = 1, + SPI_FREQUENCY_48MHZ = 2, + SPI_FREQUENCY_50MHZ_30MHZ = 4, + SPI_FREQUENCY_17MHZ = 6, +}; + +/* flash descriptor */ +typedef struct { + uint32_t flvalsig; + uint32_t flmap0; + uint32_t flmap1; + uint32_t flmap2; +} __attribute__((packed)) fdbar_t; + +/* component section */ +typedef struct { + uint32_t flcomp; + uint32_t flill; + uint32_t flpb; +} __attribute__((packed)) fcba_t; + +/** + * valid_pointer - examine whether a pointer falls in [base, base + limit) + * @param ptr: the non-void* pointer to a single arbitrary-sized object. + * @param base: base address represented with char* type. + * @param limit: upper limit of the legal address. + * @return: ptr if valid, otherwise NULL. + */ +static void *valid_pointer(char *ptr, char *base, size_t limit) +{ + return ((char *)(ptr) >= (base) && + (char *)&(ptr)[1] <= (base) + (limit)) ? ptr : NULL; +} + +/** + * find_fd - Find firmware flash descriptor + * @param image: pointer to image in ram + * @param size: size of image + * @return: pointer to flash descriptor or NULL + */ +static fdbar_t *find_fd(char *image, int size) +{ +#define FD_SIGNATURE 0x0FF0A55A + int i, found = 0; + + /* Scan for FD signature */ + for (i = 0; i < (size - 4); i += 4) { + if (*(uint32_t *) (image + i) == FD_SIGNATURE) { + found = 1; + break; /* signature found. */ + } + } + + if (!found) { + printf("No Flash Descriptor found in this image\n"); + return NULL; + } + + return (fdbar_t *)valid_pointer(image + i, image, size); +} + + +/** + * find_fcba - Find FCBA block in image + * @param image: pointer to image in ram + * @param size: size of image + * @return: pointer to FCBA or NULL + */ +static fcba_t *find_fcba(fdbar_t *fdb, char *image, int size) +{ + return (fcba_t *)valid_pointer(image + ((fdb->flmap0 & 0xff) << 4), image, size); +} + +/* + * There is no version field in the descriptor so to determine + * if this is a new descriptor format we check the hardcoded SPI + * read frequency to see if it is fixed at 20MHz or 17MHz. + */ +static int get_ifd_version(fcba_t *fcba, int platform) +{ + int read_freq; + unsigned int i; + + /* Some newer platforms have re-defined the FCBA field that was + * used to distinguish IFD v1 v/s v2. Define a list of platforms + * that we know do not have the required FCBA field, but are IFD + * v2 and return true if current platform is one of them. + */ + static const int ifd_2_platforms[] = { + PLATFORM_GLK, + PLATFORM_CNL, + PLATFORM_ICL, + PLATFORM_TGL, + }; + + /* Unfortunately we do not have a way to determine the + * platform of an image any more than we have to determine + * its IFD version, but leaving this code in to elaborate + * a possible fix. + */ + for (i = 0; i < ARRAY_SIZE(ifd_2_platforms); i++) { + if (platform == ifd_2_platforms[i]) + return IFD_VERSION_2; + } + + read_freq = (fcba->flcomp >> 17) & 7; + + switch (read_freq) { + case SPI_FREQUENCY_20MHZ: + return IFD_VERSION_1; + case SPI_FREQUENCY_17MHZ: + case SPI_FREQUENCY_50MHZ_30MHZ: + return IFD_VERSION_2; + default: + fprintf(stderr, "Unknown descriptor version: %d\n", + read_freq); + exit(EXIT_FAILURE); + } +} + +static void ifd_set_spi_frequency(fcba_t *fcba, enum spi_frequency freq) +{ + /* clear bits 21-30 */ + fcba->flcomp &= ~0x7fe00000; + /* Read ID and Read Status Clock Frequency */ + fcba->flcomp |= freq << 27; + /* Write and Erase Clock Frequency */ + fcba->flcomp |= freq << 24; + /* Fast Read Clock Frequency */ + fcba->flcomp |= freq << 21; +} + +static void ifd_set_em100_mode(fcba_t *fcba, struct em100 *em100) +{ + int freq; + + if (em100->hwversion == HWVERSION_EM100PRO_G2) { + printf("Warning: EM100Pro-G2 can run at full speed.\n"); + } + + /* Auto-detect IFD version. Right now we don't support + * hard-coding the IFD version, hence passing -1 for platform. + */ + int ifd_version = get_ifd_version(fcba, -1); + switch (ifd_version) { + case IFD_VERSION_1: + freq = SPI_FREQUENCY_20MHZ; + printf("Limit SPI frequency to 20MHz.\n"); + break; + case IFD_VERSION_2: + freq = SPI_FREQUENCY_17MHZ; + printf("Limit SPI frequency to 17MHz.\n"); + break; + default: + freq = SPI_FREQUENCY_17MHZ; + printf("Limit SPI frequency to 17MHz.\n"); + break; + } + + ifd_set_spi_frequency(fcba, freq); +} + +/** + * autocorrect_image: Modify image to work with EM100 + * @param em100: initialized em100 device structure + * @param image: pointer to emulated image in RAM + * @param size: size of emulated image + * + * @return: 0: image type known and image patched + * @return: 1: image type not detected (unpatched) + */ + +int autocorrect_image(struct em100 *em100, char *image, size_t size) +{ + printf("Auto-detecting image type ... "); + fdbar_t *fdb = find_fd(image, size); + if (fdb) { + printf("IFD\n"); + + fcba_t *fcba = find_fcba(fdb, image, size); + if (!fcba) { + printf("Inconsistent image.\n"); + return 1; + } + + /* Set EM100 mode */ + ifd_set_em100_mode(fcba, em100); + } else { + printf("<unknown>\n"); + return 1; /* No support for other image types (yet). */ + } + + return 0; +}