Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Kilari Raasi, Nick Vaccaro, Paul Menzel, Varshit Pandya.
Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Ronak Kanabar, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81446?usp=email
to look at the new patch set (#7).
Change subject: soc/intel/alderlake: Remove FSP_PUBLISH_MBP_HOB config for RPL ......................................................................
soc/intel/alderlake: Remove FSP_PUBLISH_MBP_HOB config for RPL
The RPL FSP currently uses HECI commands to retrieve the chipset initialization version because the MBP HOB creation is disabled (SkipMbpHob=1). This has resulted in an approximate 150ms increase in boot time. Investigations are ongoing to determine the cause of the delay when using HECI commands. As an interim solution, this patch sets SkipMbpHob=0, enabling the use of MBP HOB or acquiring the chipset initialization version, which is expected to reduce the boot time.
BUG=b:328430167 TEST= Able to build,boot and collect boot time data of brya.
With this patch: 963:returning from FspMultiPhaseSiInit 1,337,481 (249,046)
Without this patch: 963:returning from FspMultiPhaseSiInit 1,496,268 (408,194)
Signed-off-by: Kilari Raasi kilari.raasi@intel.com Change-Id: I8a99a57b644732074e41051d99e63576f1edd229 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 2 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/81446/7