[XS] Change in coreboot[main]: soc/intel/meteorlake: Change the maximum C state to C8

[Jérémy Compostella (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub Czapiga, Kapil Porwal, Sean Rhodes, Subrata Banik, Tarun.

Jérémy Compostella has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85690?usp=email )

Change subject: soc/intel/meteorlake: Change the maximum C state to C8
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Patch Set 4:

(1 comment)

Patchset:

PS4: 
I am a little bit confused because `C_STATE_C7S_LONG_LAT` is also used in S0iX case in acpi.c. Therefore, I decided to look at it on a rex board. I looked at the kernel code:

arch/x86/kernel/acpi/cstate.c
```
    cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);

/* Check whether this particular cx_type (in CST) is supported or not */
    cstate_type = (((cx->address >> MWAIT_SUBSTATE_SIZE) &
    		MWAIT_CSTATE_MASK) + 1) & MWAIT_CSTATE_MASK;
    edx_part = edx >> (cstate_type * MWAIT_SUBSTATE_SIZE);
    num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;

retval = 0;
    /* If the HW does not support any sub-states in this C-state */
    if (num_cstate_subtype == 0) {
    	pr_warn(FW_BUG "ACPI MWAIT C-state 0x%x not supported by HW (0x%x)\n",
    			cx->address, edx_part);
```

And then did the math based on data collected on the board.

```
cstate_type = ((0x33 >> 4) & 0xf) + 1 = 4

rex-rev2 ~ # iotools cpuid 0 5
0x00000040 0x00000040 0x00000003 0x11112020

edx_part = 0x11112020 >> (4 * 4) = 0x11112020 >> 16 = 0x1111
num_cstate_subtype = 0x1111 & 0xf = 1
```

So on this Meteor Lake board, `num_cstate_subtype` is 1 and it should not hit the M-wait error.