Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 4 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/1
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 9d98637..df591cd 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -66,22 +66,6 @@ southbridge_configure_default_intmap();
static const u32 rcba_dump3[] = { - /* 3400 */ 0x0000001c, 0x00000080, 0x00000000, 0x00000000, - /* 3410 */ 0x00000c61, 0x00000000, 0x16e41fe1, 0xbf4f001f, - /* 3420 */ 0x00000000, 0x00060010, 0x0000001d, 0x00000000, - /* 3430 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3440 */ 0xdeaddeed, 0x00000000, 0x00000000, 0x00000000, - /* 3450 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3460 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3470 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3480 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3490 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, /* 3500 */ 0x20000557, 0x2000055f, 0x2000074b, 0x2000074b, /* 3510 */ 0x20000557, 0x2000014b, 0x2000074b, 0x2000074b, /* 3520 */ 0x2000074b, 0x2000074b, 0x2000055f, 0x2000055f, @@ -120,8 +104,8 @@ }; unsigned i; for (i = 0; i < sizeof(rcba_dump3) / 4; i++) { - RCBA32(4 * i + 0x3400) = rcba_dump3[i]; - (void)RCBA32(4 * i + 0x3400); + RCBA32(4 * i + 0x3500) = rcba_dump3[i]; + (void)RCBA32(4 * i + 0x3500); } }
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c index a426d89..644c1c2 100644 --- a/src/mainboard/packardbell/ms2290/romstage.c +++ b/src/mainboard/packardbell/ms2290/romstage.c @@ -61,22 +61,6 @@ southbridge_configure_default_intmap();
static const u32 rcba_dump3[] = { - /* 3400 */ 0x0000001c, 0x00000080, 0x00000000, 0x00000000, - /* 3410 */ 0x00000c61, 0x00000000, 0x16fc1fe1, 0xbf4f001f, - /* 3420 */ 0x00000000, 0x00060010, 0x0000001d, 0x00000000, - /* 3430 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3440 */ 0xdeaddeed, 0x00000000, 0x00000000, 0x00000000, - /* 3450 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3460 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3470 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3480 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3490 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, /* 3500 */ 0x20000557, 0x2000055f, 0x2000074b, 0x2000074b, /* 3510 */ 0x20000557, 0x2000014b, 0x2000074b, 0x2000074b, /* 3520 */ 0x2000074b, 0x2000074b, 0x2000055f, 0x2000055f, @@ -116,8 +100,8 @@ unsigned i;
for (i = 0; i < sizeof(rcba_dump3) / 4; i++) { - RCBA32(4 * i + 0x3400) = rcba_dump3[i]; - (void)RCBA32(4 * i + 0x3400); + RCBA32(4 * i + 0x3500) = rcba_dump3[i]; + (void)RCBA32(4 * i + 0x3500); } }
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/35440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35440/1//COMMIT_MSG@9 PS1, Line 9: elsewhere Where?
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#2).
Change subject: [WIP]sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
[WIP]sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
TODO: disabling PCH devices in not yet handled.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 4 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/2
Hello Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#3).
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 4 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/3
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
Patch Set 3: Code-Review+1
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#4).
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
TODO: unused FD are still in the mainboard dir.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 16 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/4
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35440/4/src/mainboard/lenovo/x201/r... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/4/src/mainboard/lenovo/x201/r... PS4, Line 68: hiders hides
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#5).
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
TODO: some FD are still in the mainboard dir.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 22 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/5
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#7).
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
TODO: some FD are still in the mainboard dir.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 22 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/7
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
Patch Set 7: Code-Review+2
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35440/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35440/7//COMMIT_MSG@7 PS7, Line 7: sb/intel/ibexpeak: Remove handled RCBA entries from replay Perhaps 'intel/ibexpeak boards:'
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#8).
Change subject: sb/intel/ibexpeak: Remove handled RCBA entries from replay ......................................................................
sb/intel/ibexpeak: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
TODO: some FD are still in the mainboard dir.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 22 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/8
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#9).
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
intel/ibexpeak boards: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 22 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/9
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35440/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35440/7//COMMIT_MSG@7 PS7, Line 7: sb/intel/ibexpeak: Remove handled RCBA entries from replay
Perhaps 'intel/ibexpeak boards:'
Done
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#11).
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
intel/ibexpeak boards: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 22 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/11
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
Patch Set 11: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... PS11, Line 73: 0xdeaddeed lol
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... PS11, Line 71: (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) : | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 28) | 1; 1. What's bit 28? the comment doesn't mention it.
2. Do we need so many shifts?
RCBA32(FD) = (0xff << 5) | (1 << 28) | 1;
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/lenovo/x201/... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/lenovo/x201/... PS12, Line 70: present in end user devices anyway. */ don't seem to be ?
I think the case was, once USB rate matching hub is enabled, UHCI disappeared and EHCI moved from function 7 to function 0.
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/packardbell/... File src/mainboard/packardbell/ms2290/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/packardbell/... PS12, Line 65: present in end user devices anyway. */ like x201
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/lenovo/x201/... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/lenovo/x201/... PS12, Line 70: present in end user devices anyway. */
don't seem to be ?
I think the case was, once USB rate matching hub is enabled, UHCI disappeared and EHCI moved from function 7 to function 0.
Ah indeed EDS says this. I'll update the comment.
Hello Kyösti Mälkki, Alexander Couzens, Patrick Rudolph, Angel Pons, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35440
to look at the new patch set (#13).
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
intel/ibexpeak boards: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 20 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/35440/13
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
Patch Set 13:
(5 comments)
https://review.coreboot.org/c/coreboot/+/35440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35440/1//COMMIT_MSG@9 PS1, Line 9: elsewhere
Where?
Mostly in southbridge ramstage code. I don't think it's necessary to provide an exhaustive list.
https://review.coreboot.org/c/coreboot/+/35440/4/src/mainboard/lenovo/x201/r... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/4/src/mainboard/lenovo/x201/r... PS4, Line 68: hiders
hides
Done
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... PS11, Line 71: (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9) : | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 28) | 1;
- What's bit 28? the comment doesn't mention it. […]
Done
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/lenovo/x201/... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/lenovo/x201/... PS12, Line 70: present in end user devices anyway. */
don't seem to be ? […]
Done
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/packardbell/... File src/mainboard/packardbell/ms2290/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/12/src/mainboard/packardbell/... PS12, Line 65: present in end user devices anyway. */
like x201
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
Patch Set 13: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/35440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35440/1//COMMIT_MSG@9 PS1, Line 9: elsewhere
Where? […]
Ack
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... File src/mainboard/lenovo/x201/romstage.c:
https://review.coreboot.org/c/coreboot/+/35440/11/src/mainboard/lenovo/x201/... PS11, Line 68: Must When Intel says "must", I say "maybe not". I'm curious about those "performance counters", one day I'll try looking at them :)
Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35440 )
Change subject: intel/ibexpeak boards: Remove handled RCBA entries from replay ......................................................................
intel/ibexpeak boards: Remove handled RCBA entries from replay
The RCBA registers 0x3400-0x3500 are all handled elsewhere in the code, so no need to have a 'replay' of those.
The remainder now consist of USB setup and undocumented bits that should likely not be touched at all.
Change-Id: I69fc8a5e16f7cf0e1068d0d2ed678a6c2f6e70a9 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/35440 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/lenovo/x201/romstage.c M src/mainboard/packardbell/ms2290/romstage.c 2 files changed, 20 insertions(+), 36 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 9d98637..1d364b6 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -65,23 +65,15 @@ { southbridge_configure_default_intmap();
+ /* Must set BIT0 (hides performance counters PCI device). + coreboot enables the Rate Matching Hub which makes the UHCI PCI + devices disappear, so BIT5-12 and BIT28 can be set to hide those. */ + RCBA32(FD) = (1 << 28) | (0xff << 5) | 1; + + /* Set reserved bit to 1 */ + RCBA32(FD2) = 1; + static const u32 rcba_dump3[] = { - /* 3400 */ 0x0000001c, 0x00000080, 0x00000000, 0x00000000, - /* 3410 */ 0x00000c61, 0x00000000, 0x16e41fe1, 0xbf4f001f, - /* 3420 */ 0x00000000, 0x00060010, 0x0000001d, 0x00000000, - /* 3430 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3440 */ 0xdeaddeed, 0x00000000, 0x00000000, 0x00000000, - /* 3450 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3460 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3470 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3480 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3490 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, /* 3500 */ 0x20000557, 0x2000055f, 0x2000074b, 0x2000074b, /* 3510 */ 0x20000557, 0x2000014b, 0x2000074b, 0x2000074b, /* 3520 */ 0x2000074b, 0x2000074b, 0x2000055f, 0x2000055f, @@ -120,8 +112,8 @@ }; unsigned i; for (i = 0; i < sizeof(rcba_dump3) / 4; i++) { - RCBA32(4 * i + 0x3400) = rcba_dump3[i]; - (void)RCBA32(4 * i + 0x3400); + RCBA32(4 * i + 0x3500) = rcba_dump3[i]; + (void)RCBA32(4 * i + 0x3500); } }
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c index a426d89..00461a1 100644 --- a/src/mainboard/packardbell/ms2290/romstage.c +++ b/src/mainboard/packardbell/ms2290/romstage.c @@ -60,23 +60,15 @@ { southbridge_configure_default_intmap();
+ /* Must set BIT0 (hides performance counters PCI device). + coreboot enables the Rate Matching Hub which makes the UHCI PCI + devices disappear, so BIT5-12 and BIT28 can be set to hide those. */ + RCBA32(FD) = (1 << 28) | (0xff << 5) | 1; + + /* Set reserved bit to 1 */ + RCBA32(FD2) = 1; + static const u32 rcba_dump3[] = { - /* 3400 */ 0x0000001c, 0x00000080, 0x00000000, 0x00000000, - /* 3410 */ 0x00000c61, 0x00000000, 0x16fc1fe1, 0xbf4f001f, - /* 3420 */ 0x00000000, 0x00060010, 0x0000001d, 0x00000000, - /* 3430 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3440 */ 0xdeaddeed, 0x00000000, 0x00000000, 0x00000000, - /* 3450 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3460 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3470 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3480 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 3490 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, - /* 34f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000, /* 3500 */ 0x20000557, 0x2000055f, 0x2000074b, 0x2000074b, /* 3510 */ 0x20000557, 0x2000014b, 0x2000074b, 0x2000074b, /* 3520 */ 0x2000074b, 0x2000074b, 0x2000055f, 0x2000055f, @@ -116,8 +108,8 @@ unsigned i;
for (i = 0; i < sizeof(rcba_dump3) / 4; i++) { - RCBA32(4 * i + 0x3400) = rcba_dump3[i]; - (void)RCBA32(4 * i + 0x3400); + RCBA32(4 * i + 0x3500) = rcba_dump3[i]; + (void)RCBA32(4 * i + 0x3500); } }
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Kyösti Mälkki (Code Review)
-
Paul Menzel (Code Review)