Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68767 )
Change subject: coreboot_tables: Drop uart PCI addr ......................................................................
coreboot_tables: Drop uart PCI addr
Only edk2 used this to fill in a different struct but even there the entries go unused, so removing this struct element from coreboot has no side effects.
Change-Id: Iadd2678c4e01d30471eac43017392d256adda341 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/68767 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Elyes Haouas ehaouas@noos.fr Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Bill XIE persmule@hardenedlinux.org Reviewed-by: Lean Sheng Tan sheng.tan@9elements.com --- M configs/config.intel_harcuvar M payloads/libpayload/include/coreboot_tables.h M src/commonlib/include/commonlib/coreboot_tables.h M src/drivers/uart/Kconfig M src/drivers/uart/pl011.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/lib/coreboot_table.c M src/mainboard/emulation/qemu-power8/uart.c M src/soc/intel/quark/Kconfig M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c M src/soc/samsung/exynos5420/uart.c M src/soc/ti/am335x/uart.c M tests/lib/coreboot_table-test.c 19 files changed, 20 insertions(+), 52 deletions(-)
Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, but someone else must approve Bill XIE: Looks good to me, but someone else must approve Hung-Te Lin: Looks good to me, but someone else must approve Lean Sheng Tan: Looks good to me, approved
diff --git a/configs/config.intel_harcuvar b/configs/config.intel_harcuvar index 5c7de12..3476817 100644 --- a/configs/config.intel_harcuvar +++ b/configs/config.intel_harcuvar @@ -4,7 +4,6 @@ CONFIG_BOARD_INTEL_HARCUVAR=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_ENABLE_HSUART=y -CONFIG_UART_PCI_ADDR=0x8000d000
#Sample settings for Denverton-NS FSP. #CONFIG_ADD_FSP_BINARIES=y diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index a8fd5cd..5f6a223 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -191,14 +191,6 @@ * decisions as to which dividers to select and their values * to eventually arrive at the desired console baud-rate. */ u32 input_hertz; - - /* UART PCI address: bus, device, function - * 1 << 31 - Valid bit, PCI UART in use - * Bus << 20 - * Device << 15 - * Function << 12 - */ - u32 uart_pci_addr; };
struct cb_console { diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 3f7ff2d..6b5eb59 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -197,14 +197,6 @@ * decisions as to which dividers to select and their values * to eventually arrive at the desired console baud-rate. */ uint32_t input_hertz; - - /* UART PCI address: bus, device, function - * 1 << 31 - Valid bit, PCI UART in use - * Bus << 20 - * Device << 15 - * Function << 12 - */ - uint32_t uart_pci_addr; };
struct lb_console { diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index beba401..a2a7f9f 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -75,14 +75,3 @@ default n help Use uart_platform_refclk to specify the input clock value. - -config UART_PCI_ADDR - hex "UART's PCI bus, device, function address" - default 0x0 - help - Specify zero if the UART is connected to another bus type. - For PCI based UARTs, build the value as: - * 1 << 31 - Valid bit, PCI UART in use - * Bus << 20 - * Device << 15 - * Function << 12 diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index 0a73d82..3653262 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -43,7 +43,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 1; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index aa8c969..79df37c 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -114,7 +114,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 1; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data); diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c index 1834095..79e786b 100644 --- a/src/drivers/uart/uart8250mem.c +++ b/src/drivers/uart/uart8250mem.c @@ -146,7 +146,6 @@ else serial.regwidth = sizeof(uint8_t); serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 2a7ccc5..4df7039 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -109,7 +109,6 @@ serial->baud = new_serial->baud; serial->regwidth = new_serial->regwidth; serial->input_hertz = new_serial->input_hertz; - serial->uart_pci_addr = new_serial->uart_pci_addr; }
void lb_add_console(uint16_t consoletype, void *data) diff --git a/src/mainboard/emulation/qemu-power8/uart.c b/src/mainboard/emulation/qemu-power8/uart.c index 4b1bf32..a2f9116 100644 --- a/src/mainboard/emulation/qemu-power8/uart.c +++ b/src/mainboard/emulation/qemu-power8/uart.c @@ -37,7 +37,6 @@ serial.baud = 115200; serial.regwidth = 1; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 2ecdd37..9783c1d 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -63,14 +63,6 @@ default 3 depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1
-# Console: PCI UART bus 0 << 20, device 20 << 15, function x << 12 -# Valid bit, PCI UART in use: 1 << 31 -config UART_PCI_ADDR - hex - default 0x800a1000 if ENABLE_BUILTIN_HSUART0 - default 0x800a5000 if ENABLE_BUILTIN_HSUART1 - depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1 - ##### # Debug support # The following options provide debug support for the Quark coreboot diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c index ba3c71a..11c3452 100644 --- a/src/soc/mediatek/common/uart.c +++ b/src/soc/mediatek/common/uart.c @@ -167,7 +167,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 4; serial.input_hertz = UART_HZ; - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index aba8dd9..77d6de2 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -122,7 +122,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 4; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c index 98c3d4c..b2cdf67 100644 --- a/src/soc/nvidia/tegra210/uart.c +++ b/src/soc/nvidia/tegra210/uart.c @@ -109,7 +109,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 4; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c index 9c50611..c04a773 100644 --- a/src/soc/qualcomm/ipq40xx/uart.c +++ b/src/soc/qualcomm/ipq40xx/uart.c @@ -265,7 +265,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 1; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c index 97f9e76..007a980 100644 --- a/src/soc/qualcomm/qcs405/uart.c +++ b/src/soc/qualcomm/qcs405/uart.c @@ -266,7 +266,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 1; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c index ef03c04..7943651 100644 --- a/src/soc/samsung/exynos5250/uart.c +++ b/src/soc/samsung/exynos5250/uart.c @@ -140,7 +140,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 4; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c index 16a4b11..1268183 100644 --- a/src/soc/samsung/exynos5420/uart.c +++ b/src/soc/samsung/exynos5420/uart.c @@ -131,7 +131,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 4; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = 0; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/ti/am335x/uart.c b/src/soc/ti/am335x/uart.c index e3648a9..136d785 100644 --- a/src/soc/ti/am335x/uart.c +++ b/src/soc/ti/am335x/uart.c @@ -178,7 +178,6 @@ serial.baud = get_uart_baudrate(); serial.regwidth = 2; serial.input_hertz = uart_platform_refclk(); - serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/tests/lib/coreboot_table-test.c b/tests/lib/coreboot_table-test.c index 20438ef..5257552 100644 --- a/tests/lib/coreboot_table-test.c +++ b/tests/lib/coreboot_table-test.c @@ -127,7 +127,6 @@ serial.baud = 115200; serial.regwidth = 1; serial.input_hertz = 115200 * 16; - serial.uart_pci_addr = 0x0; lb_add_serial(&serial, header);
assert_int_equal(1, header->table_entries); @@ -244,7 +243,6 @@ serial.baud = 115200; serial.regwidth = 1; serial.input_hertz = 115200 * 16; - serial.uart_pci_addr = 0x0; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); @@ -419,7 +417,6 @@ assert_int_equal(115200, serial->baud); assert_int_equal(1, serial->regwidth); assert_int_equal(115200 * 16, serial->input_hertz); - assert_int_equal(0x0, serial->uart_pci_addr); break; case LB_TAG_CONSOLE: assert_int_equal(sizeof(struct lb_console), record->size);
-
Felix Held (Code Review)