Attention is currently required from: Alexander Couzens, Maciej Pijanowski, Paul Menzel.
Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80609?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M920q (Cannon Lake)
......................................................................
Patch Set 6:
(3 comments)
File src/mainboard/lenovo/m920q/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80609/comment/3e147e99_32e30d78 :
PS6, Line 58: # not populated. Probably enabled on some variants only.
Seems to be populated on the M920x variant.
File src/mainboard/lenovo/m920q/romstage.c:
https://review.coreboot.org/c/coreboot/+/80609/comment/77151dc4_b5abb8a9 :
PS6, Line 13: .spd[0] = {
Platform only has 2 DIMMs
https://review.coreboot.org/c/coreboot/+/80609/comment/3271581c_7d6c1d68 :
PS6, Line 33: /* Rcomp target values for CFL-S, DDR4 and 2 DIMMs per channel */
There's 1 DIMM per channel here
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