Change in coreboot[master]: mb/asus/p8z77: Turn P8Z77-M PRO into a variant of P8x7x baseboard
Bill XIE has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54335 )
Change subject: mb/asus/p8z77: Turn P8Z77-M PRO into a variant of P8x7x baseboard ......................................................................
mb/asus/p8z77: Turn P8Z77-M PRO into a variant of P8x7x baseboard
Other variants would be added later.
MAINBOARD_HAS_TPM1 should not be selected, since the module is replaceable.
Signed-off-by: Bill XIE persmule@hardenedlinux.org Change-Id: Iaf0bd4c993debe4d5d7ca695473438bd4c954290 --- A src/mainboard/asus/p8x7x/Kconfig R src/mainboard/asus/p8x7x/Kconfig.name A src/mainboard/asus/p8x7x/Makefile.inc R src/mainboard/asus/p8x7x/acpi/ec.asl R src/mainboard/asus/p8x7x/acpi/platform.asl R src/mainboard/asus/p8x7x/acpi/superio.asl A src/mainboard/asus/p8x7x/board_info.txt R src/mainboard/asus/p8x7x/cmos.default R src/mainboard/asus/p8x7x/cmos.layout A src/mainboard/asus/p8x7x/devicetree.cb R src/mainboard/asus/p8x7x/dsdt.asl A src/mainboard/asus/p8x7x/hda_verb.c R src/mainboard/asus/p8x7x/variants/z77-m_pro/acpi_tables.c A src/mainboard/asus/p8x7x/variants/z77-m_pro/board_info.txt R src/mainboard/asus/p8x7x/variants/z77-m_pro/data.vbt R src/mainboard/asus/p8x7x/variants/z77-m_pro/early_init.c R src/mainboard/asus/p8x7x/variants/z77-m_pro/gma-mainboard.ads R src/mainboard/asus/p8x7x/variants/z77-m_pro/gpio.c R src/mainboard/asus/p8x7x/variants/z77-m_pro/hda_verb.c R src/mainboard/asus/p8x7x/variants/z77-m_pro/mainboard.c A src/mainboard/asus/p8x7x/variants/z77-m_pro/overridetree.cb D src/mainboard/asus/p8z77-m_pro/Kconfig D src/mainboard/asus/p8z77-m_pro/Makefile.inc D src/mainboard/asus/p8z77-m_pro/board_info.txt D src/mainboard/asus/p8z77-m_pro/devicetree.cb 25 files changed, 184 insertions(+), 139 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/54335/1
diff --git a/src/mainboard/asus/p8x7x/Kconfig b/src/mainboard/asus/p8x7x/Kconfig new file mode 100644 index 0000000..e6e9bf7 --- /dev/null +++ b/src/mainboard/asus/p8x7x/Kconfig @@ -0,0 +1,39 @@ +## SPDX-License-Identifier: GPL-2.0-only + +if BOARD_ASUS_P8Z77_M_PRO + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_8192 + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select INTEL_INT15 + select NORTHBRIDGE_INTEL_SANDYBRIDGE + select SERIRQ_CONTINUOUS_MODE + select SOUTHBRIDGE_INTEL_C216 + select MAINBOARD_HAS_LPC_TPM if BOARD_ASUS_P8Z77_M_PRO + select HAVE_OPTION_TABLE + select HAVE_CMOS_DEFAULT + select MAINBOARD_HAS_LIBGFXINIT + select INTEL_GMA_HAVE_VBT + select SUPERIO_NUVOTON_NCT6779D + # for ASM1061 eSATA + select DRIVERS_ASMEDIA_ASPM_BLACKLIST if BOARD_ASUS_P8Z77_M_PRO + +config MAINBOARD_DIR + string + default "asus/p8x7x" + +config VARIANT_DIR + string + default "z77-m_pro" if BOARD_ASUS_P8Z77_M_PRO + +config MAINBOARD_PART_NUMBER + string + default "P8Z77-M PRO" if BOARD_ASUS_P8Z77_M_PRO + +config OVERRIDE_DEVICETREE + string + default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" + +endif # BOARD_ASUS_P8Z77_M_PRO diff --git a/src/mainboard/asus/p8z77-m_pro/Kconfig.name b/src/mainboard/asus/p8x7x/Kconfig.name similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/Kconfig.name rename to src/mainboard/asus/p8x7x/Kconfig.name diff --git a/src/mainboard/asus/p8x7x/Makefile.inc b/src/mainboard/asus/p8x7x/Makefile.inc new file mode 100644 index 0000000..728c213 --- /dev/null +++ b/src/mainboard/asus/p8x7x/Makefile.inc @@ -0,0 +1,10 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +bootblock-y += variants/$(VARIANT_DIR)/early_init.c +bootblock-y += variants/$(VARIANT_DIR)/gpio.c +romstage-y += variants/$(VARIANT_DIR)/early_init.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c +ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c +ramstage-y += variants/$(VARIANT_DIR)/mainboard.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads + diff --git a/src/mainboard/asus/p8z77-m_pro/acpi/ec.asl b/src/mainboard/asus/p8x7x/acpi/ec.asl similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/acpi/ec.asl rename to src/mainboard/asus/p8x7x/acpi/ec.asl diff --git a/src/mainboard/asus/p8z77-m_pro/acpi/platform.asl b/src/mainboard/asus/p8x7x/acpi/platform.asl similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/acpi/platform.asl rename to src/mainboard/asus/p8x7x/acpi/platform.asl diff --git a/src/mainboard/asus/p8z77-m_pro/acpi/superio.asl b/src/mainboard/asus/p8x7x/acpi/superio.asl similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/acpi/superio.asl rename to src/mainboard/asus/p8x7x/acpi/superio.asl diff --git a/src/mainboard/asus/p8x7x/board_info.txt b/src/mainboard/asus/p8x7x/board_info.txt new file mode 100644 index 0000000..8fd3401 --- /dev/null +++ b/src/mainboard/asus/p8x7x/board_info.txt @@ -0,0 +1,6 @@ +Category: desktop +Board name: ASUS P8x7x baseboard +ROM package: DIP-8 +ROM protocol: SPI +ROM socketed: y +Flashrom support: y diff --git a/src/mainboard/asus/p8z77-m_pro/cmos.default b/src/mainboard/asus/p8x7x/cmos.default similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/cmos.default rename to src/mainboard/asus/p8x7x/cmos.default diff --git a/src/mainboard/asus/p8z77-m_pro/cmos.layout b/src/mainboard/asus/p8x7x/cmos.layout similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/cmos.layout rename to src/mainboard/asus/p8x7x/cmos.layout diff --git a/src/mainboard/asus/p8x7x/devicetree.cb b/src/mainboard/asus/p8x7x/devicetree.cb new file mode 100644 index 0000000..c66f601 --- /dev/null +++ b/src/mainboard/asus/p8x7x/devicetree.cb @@ -0,0 +1,89 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device cpu_cluster 0x0 on + chip cpu/intel/model_206ax + register "acpi_c1" = "1" + register "acpi_c2" = "3" + register "acpi_c3" = "5" + device lapic 0x0 on end + device lapic 0xacac off end + end + end + device domain 0x0 on + subsystemid 0x1043 0x84ca inherit + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PCIe Bridge for discrete graphics + device pci 02.0 on end # Internal graphics VGA controller + + chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH + register "c2_latency" = "0x65" + register "gen1_dec" = "0xc0291" + register "sata_interface_speed_support" = "0x3" # 0x3=SATAIII + register "sata_port_map" = "0x3f" # Enable the six SATA ports + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + register "superspeed_capable_ports" = "0xf" + register "xhci_overcurrent_mapping" = "0xc03" + register "xhci_switchable_ports" = "0xf" # the 4 ports + + device pci 14.0 on end # USB 3.0 Controller + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 off end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB2 EHCI 2 + device pci 1b.0 on end # High Definition Audio controller + device pci 1c.0 off end # PCIe Port 1 + device pci 1c.1 off end # PCIe Port 2 + device pci 1c.2 off end # PCIe Port 3 + device pci 1c.3 off end # PCIe Port 4 + device pci 1c.4 off end # PCIe Port 5 + device pci 1c.5 off end # PCIe Port 6 + device pci 1c.6 off end # PCIe Port 7 + device pci 1c.7 off end # PCIe Port 8 + device pci 1d.0 on end # USB2 EHCI 1 + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on # LPC bridge + chip superio/nuvoton/nct6779d + device pnp 2e.1 off end # Parallel + device pnp 2e.2 off end # UART A + device pnp 2e.3 off end # UART B, IR + device pnp 2e.5 on # PS2 KBC + io 0x60 = 0x0060 # KBC1 base + io 0x62 = 0x0064 # KBC2 base + irq 0x70 = 1 # Keyboard IRQ + irq 0x72 = 12 # Mouse IRQ + + # KBC 12Mhz/A20 speed/sw KBRST + drq 0xf0 = 0x82 + end + device pnp 2e.6 off end # CIR + device pnp 2e.7 off end # GPIOs 6-8 + device pnp 2e.8 off end # WDT1 GPIO 0-1 + device pnp 2e.108 off end # GPIO0 + device pnp 2e.109 off end # GPIO1 + device pnp 2e.209 off end # GPIO2 + device pnp 2e.309 off end # GPIO3 + device pnp 2e.409 off end # GPIO4 + device pnp 2e.509 off end # GPIO5 + device pnp 2e.609 off end # GPIO6 + device pnp 2e.709 off end # GPIO7 + device pnp 2e.9 off end # GPIO8 + device pnp 2e.a off end # ACPI + device pnp 2e.b off end # H/W Monitor, FP LED + device pnp 2e.d off end # WDT1 + device pnp 2e.e off end # CIR wake-up + device pnp 2e.f off end # Push-pull/Open-drain + device pnp 2e.14 off end # Port 80 UART + device pnp 2e.16 off end # Deep sleep + end + end + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal + end + end +end diff --git a/src/mainboard/asus/p8z77-m_pro/dsdt.asl b/src/mainboard/asus/p8x7x/dsdt.asl similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/dsdt.asl rename to src/mainboard/asus/p8x7x/dsdt.asl diff --git a/src/mainboard/asus/p8x7x/hda_verb.c b/src/mainboard/asus/p8x7x/hda_verb.c new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/mainboard/asus/p8x7x/hda_verb.c diff --git a/src/mainboard/asus/p8z77-m_pro/acpi_tables.c b/src/mainboard/asus/p8x7x/variants/z77-m_pro/acpi_tables.c similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/acpi_tables.c rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/acpi_tables.c diff --git a/src/mainboard/asus/p8x7x/variants/z77-m_pro/board_info.txt b/src/mainboard/asus/p8x7x/variants/z77-m_pro/board_info.txt new file mode 100644 index 0000000..9325e98 --- /dev/null +++ b/src/mainboard/asus/p8x7x/variants/z77-m_pro/board_info.txt @@ -0,0 +1,3 @@ +Board name: ASUS P8Z77-M PRO +Board URL: https://www.asus.com/Motherboards/P8Z77M_PRO/ +Release year: 2013 diff --git a/src/mainboard/asus/p8z77-m_pro/data.vbt b/src/mainboard/asus/p8x7x/variants/z77-m_pro/data.vbt similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/data.vbt rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/data.vbt Binary files differ diff --git a/src/mainboard/asus/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8x7x/variants/z77-m_pro/early_init.c similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/early_init.c rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/early_init.c diff --git a/src/mainboard/asus/p8z77-m_pro/gma-mainboard.ads b/src/mainboard/asus/p8x7x/variants/z77-m_pro/gma-mainboard.ads similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/gma-mainboard.ads rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/gma-mainboard.ads diff --git a/src/mainboard/asus/p8z77-m_pro/gpio.c b/src/mainboard/asus/p8x7x/variants/z77-m_pro/gpio.c similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/gpio.c rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/gpio.c diff --git a/src/mainboard/asus/p8z77-m_pro/hda_verb.c b/src/mainboard/asus/p8x7x/variants/z77-m_pro/hda_verb.c similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/hda_verb.c rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/hda_verb.c diff --git a/src/mainboard/asus/p8z77-m_pro/mainboard.c b/src/mainboard/asus/p8x7x/variants/z77-m_pro/mainboard.c similarity index 100% rename from src/mainboard/asus/p8z77-m_pro/mainboard.c rename to src/mainboard/asus/p8x7x/variants/z77-m_pro/mainboard.c diff --git a/src/mainboard/asus/p8x7x/variants/z77-m_pro/overridetree.cb b/src/mainboard/asus/p8x7x/variants/z77-m_pro/overridetree.cb new file mode 100644 index 0000000..e85e647 --- /dev/null +++ b/src/mainboard/asus/p8x7x/variants/z77-m_pro/overridetree.cb @@ -0,0 +1,37 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0x0 on + chip southbridge/intel/bd82x6x + register "gen4_dec" = "0x0000ff29" + register "pcie_port_coalesce" = "1" + device pci 1c.0 on end # PCIe Port 1 PCIEX_16_3 + device pci 1c.1 on end # PCIe Port 2 RTL8111F + device pci 1c.5 on end # PCIe Port 6 ASM1042 USB3 + device pci 1c.6 on end # PCIe Port 7 ASM1061 eSATA + device pci 1f.0 on # LPC bridge + chip superio/nuvoton/nct6779d + device pnp 2e.3 on # UART B, IR + io 0x60 = 0x2f8 # COM2 address + end + device pnp 2e.5 on # PS2 KBC + # KBC 12Mhz/A20 speed/sw KBRST + drq 0xf0 = 0x82 + end + device pnp 2e.7 on end # GPIOs 6-8 + device pnp 2e.a off + drq 0xe4 = 0x10 # Enable 3VSBS to power RAM on S3 + drq 0xe7 = 0x10 # 0.5s S3 delay for compatibility + end + device pnp 2e.f on # Push-pull/Open-drain + drq 0xe6 = 0x7f # GP7 PP + end + device pnp 2e.14 on end # Port 80 UART + end + chip drivers/pc80/tpm + device pnp 4e.0 on end # TPM + end + end + end + end +end diff --git a/src/mainboard/asus/p8z77-m_pro/Kconfig b/src/mainboard/asus/p8z77-m_pro/Kconfig deleted file mode 100644 index 19a1fe1..0000000 --- a/src/mainboard/asus/p8z77-m_pro/Kconfig +++ /dev/null @@ -1,31 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -if BOARD_ASUS_P8Z77_M_PRO - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select BOARD_ROMSIZE_KB_8192 - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select INTEL_INT15 - select NORTHBRIDGE_INTEL_SANDYBRIDGE - select SERIRQ_CONTINUOUS_MODE - select SOUTHBRIDGE_INTEL_C216 - select MAINBOARD_HAS_LPC_TPM - select MAINBOARD_HAS_TPM1 - select HAVE_OPTION_TABLE - select HAVE_CMOS_DEFAULT - select MAINBOARD_HAS_LIBGFXINIT - select INTEL_GMA_HAVE_VBT - select SUPERIO_NUVOTON_NCT6779D - select DRIVERS_ASMEDIA_ASPM_BLACKLIST # for ASM1061 eSATA - -config MAINBOARD_DIR - string - default "asus/p8z77-m_pro" - -config MAINBOARD_PART_NUMBER - string - default "P8Z77-M PRO" - -endif # BOARD_ASUS_P8Z77_M_PRO diff --git a/src/mainboard/asus/p8z77-m_pro/Makefile.inc b/src/mainboard/asus/p8z77-m_pro/Makefile.inc deleted file mode 100644 index 26b20d7..0000000 --- a/src/mainboard/asus/p8z77-m_pro/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -bootblock-y += gpio.c -romstage-y += gpio.c - -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads -bootblock-y += early_init.c -romstage-y += early_init.c diff --git a/src/mainboard/asus/p8z77-m_pro/board_info.txt b/src/mainboard/asus/p8z77-m_pro/board_info.txt deleted file mode 100644 index 66e6f0d..0000000 --- a/src/mainboard/asus/p8z77-m_pro/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: desktop -Board URL: https://www.asus.com/Motherboards/P8Z77M_PRO/ -ROM package: DIP-8 -ROM protocol: SPI -ROM socketed: y -Flashrom support: y -Release year: 2013 diff --git a/src/mainboard/asus/p8z77-m_pro/devicetree.cb b/src/mainboard/asus/p8z77-m_pro/devicetree.cb deleted file mode 100644 index 1d1a244..0000000 --- a/src/mainboard/asus/p8z77-m_pro/devicetree.cb +++ /dev/null @@ -1,93 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -chip northbridge/intel/sandybridge - device cpu_cluster 0x0 on - chip cpu/intel/model_206ax - register "acpi_c1" = "1" - register "acpi_c2" = "3" - register "acpi_c3" = "5" - device lapic 0x0 on end - device lapic 0xacac off end - end - end - device domain 0x0 on - subsystemid 0x1043 0x84ca inherit - device pci 00.0 on end # Host bridge - device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics VGA controller - - chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "c2_latency" = "0x0065" - register "gen1_dec" = "0x000c0291" - register "gen4_dec" = "0x0000ff29" - register "pcie_port_coalesce" = "1" - register "sata_interface_speed_support" = "0x3" # 0x3=SATAIII - register "sata_port_map" = "0x3f" # Enable the six SATA ports - register "spi_lvscc" = "0x2005" - register "spi_uvscc" = "0x2005" - register "superspeed_capable_ports" = "0x0000000f" - register "xhci_overcurrent_mapping" = "0x00000c03" - register "xhci_switchable_ports" = "0x0000000f" # the 4 ports - - device pci 14.0 on end # USB 3.0 Controller - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT - device pci 19.0 off end # Intel Gigabit Ethernet - device pci 1a.0 on end # USB2 EHCI 2 - device pci 1b.0 on end # High Definition Audio controller - device pci 1c.0 on end # PCIe Port 1 PCIEX_16_3 - device pci 1c.1 on end # PCIe Port 2 RTL8111F - device pci 1c.2 off end # PCIe Port 3 unused - device pci 1c.3 off end # PCIe Port 4 unused - device pci 1c.4 off end # PCIe Port 5 unused - device pci 1c.5 on end # PCIe Port 6 ASM1042 USB3 - device pci 1c.6 on end # PCIe Port 7 ASM1061 eSATA - device pci 1c.7 off end # PCIe Port 8 unused - device pci 1d.0 on end # USB2 EHCI 1 - device pci 1e.0 off end # PCI bridge - device pci 1f.0 on # LPC bridge - chip superio/nuvoton/nct6779d - device pnp 2e.1 off end # Parallel - device pnp 2e.2 off end # UART A - device pnp 2e.3 on # UART B, IR - io 0x60 = 0x2f8 # COM2 address - end - device pnp 2e.5 on # PS2 KBC - io 0x60 = 0x0060 # KBC1 base - io 0x62 = 0x0064 # KBC2 base - irq 0x70 = 1 # Keyboard IRQ - irq 0x72 = 12 # Mouse IRQ - - # KBC 12Mhz/A20 speed/sw KBRST - drq 0xf0 = 0x82 - end - device pnp 2e.6 off end # CIR - device pnp 2e.7 on end # GPIOs 6-8 - device pnp 2e.8 off end # WDT1 GPIO 0-1 - device pnp 2e.9 off end # GPIO 1-8 - device pnp 2e.a on # ACPI - drq 0xe4 = 0x10 # Enable 3VSBS to power RAM on S3 - drq 0xe7 = 0x10 # 0.5s S3 delay for compatibility - end - device pnp 2e.b off end # HWM, LED - device pnp 2e.d off end # WDT1 - device pnp 2e.e off end # CIR wake-up - device pnp 2e.f on # GPIO PP/OD - drq 0xe6 = 0x7f # GP7 PP - end - device pnp 2e.14 on end # Port 80 UART - device pnp 2e.16 off end # Deep sleep - end - chip drivers/pc80/tpm - device pnp 4e.0 on end # TPM - end - end - device pci 1f.2 on end # SATA Controller 1 - device pci 1f.3 on end # SMBus - device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 off end # Thermal - end - end -end
-
Bill XIE (Code Review)