[M] Change in coreboot[master]: drivers/intel/fsp2_0/memory_init: inform user of memory training

[Jérémy Compostella (Code Review)]

Attention is currently required from: Andrey Petrov.

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70300 )

Change subject: drivers/intel/fsp2_0/memory_init: inform user of memory training
......................................................................

drivers/intel/fsp2_0/memory_init: inform user of memory training

If memory training is going to happen and early graphics is supported
by the mainboard, the `CONFIG_DISPLAY_MSG_DURING_MEMORY_TRAINING'
option makes coreboot display (on screen) the
`CONFIG_MEMORY_TRAINING_MSG' text message to inform the user that
memory training is in progress.

Memory training can take a while and an impatient end user facing a
black screen for a while may reset the device unnecessarily.

Note: macro compilation had to be used because the
`CONFIG_MEMORY_TRAINING_MSG' is a string and as such is not
systematically defined.

Change-Id: I4ea15123eed1a4355c5ff7d815925032d4151de0
Signed-off-by: Jeremy Compostella 
---
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/memory_init.c
2 files changed, 63 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/70300/1

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 8c36063..e7677ec 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -39,6 +39,22 @@
      1. Added ExtendedImageRevision field in FSP_INFO_HEADER
      2. Added FSP_NON_VOLATILE_STORAGE_HOB2

+config INFORM_USER_OF_MEMORY_TRAINING
+	bool
+	default n
+	depends on ROMSTAGE_GFX_GMA
+	help
+	  Display a message on-screen to inform the end-user that
+	  memory training is in progress
+
+config MEMORY_TRAINING_TEXT
+	string "Text to display during memory training"
+	default "Memory training in progress, please wait..."
+	depends on INFORM_USER_OF_MEMORY_TRAINING
+	help
+	  Message to be displayed while memory training is in
+	  progress. It should not exceed 80 characters.
+
 if PLATFORM_USES_FSP2_0

config PLATFORM_USES_FSP2_X86_32
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 99b0fea..61e6f1d 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -10,9 +10,11 @@
 #include <elog.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
+#include <intelblocks/early_graphics.h>
 #include <memrange.h>
 #include <mode_switch.h>
 #include <mrc_cache.h>
+#include <pc80/vga.h>
 #include <program_loading.h>
 #include <romstage_handoff.h>
 #include <security/tpm/tspi.h>
@@ -221,6 +223,20 @@
    struct memranges memmap;
 };

+static void inform_user_of_memory_training(bool start)
+{
+#if CONFIG(INFORM_USER_OF_MEMORY_TRAINING)
+	static bool vga_ready;
+	const char *str = start ? CONFIG_MEMORY_TRAINING_TEXT : "";
+
+	if (!vga_ready)
+		vga_ready = early_graphics_init();
+
+	if (vga_ready)
+		vga_line_write_centered(12, str);
+#endif
+}
+
 static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake)
 {
    uint32_t status;
@@ -288,6 +304,10 @@

post_code(POST_MEM_PREINIT_PREP_END);

+	/* Inform the end user that memory training is in progress. */
+	if (!arch_upd->NvsBufferPtr)
+		inform_user_of_memory_training(true);
+
    /* Call FspMemoryInit */
    fsp_raminit = (void *)(uintptr_t)(hdr->image_base + hdr->fsp_memory_init_entry_offset);
    fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd);
@@ -307,6 +327,10 @@
    post_code(POST_FSP_MEMORY_EXIT);
    timestamp_add_now(TS_FSP_MEMORY_INIT_END);

+	/* Memory training is over, clear the end-user notification. */
+	if (!arch_upd->NvsBufferPtr)
+		inform_user_of_memory_training(false);
+
    /* Handle any errors returned by FspMemoryInit */
    fsp_handle_reset(status);
    if (status != FSP_SUCCESS) {