[M] Change in coreboot[main]: mb/google/{brya,hades}: use soc index for variant_update_power_limits()

[Subrata Banik (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, SH Kim.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81436?usp=email )

Change subject: mb/google/{brya,hades}: use soc index for variant_update_power_limits()
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Patch Set 3:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/81436/comment/5516edb0_3829c564 :
PS3, Line 12: 
appreciate if you can share the output of soc_power_limits_config w/o and w/ your CL. I can understand it fixed a hidden issue but would be good if we can call that out in commit msg.

File src/mainboard/google/brya/variants/baseboard/brya/ramstage.c:

https://review.coreboot.org/c/coreboot/+/81436/comment/b8302a18_92695442 :
PS3, Line 25: sa_pci_id
what if `sa_pci_id` is 0xffff ?