Attention is currently required from: Nico Huber, Michał Żygowski, Michał Kopeć, Paul Menzel, Arthur Heymans. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61682 )
Change subject: nb/amd/common: Move RAM calcualtion to common code ......................................................................
Patch Set 6:
(7 comments)
File src/northbridge/amd/agesa/family14/northbridge.c:
https://review.coreboot.org/c/coreboot/+/61682/comment/88cbdc6c_4631b3c6 PS6, Line 27: static unsigned int fx_devs = 0; These arrays reduce to single struct device *, therefore any loops with FX_DEVS or fx_devs or nodeid != 0 just makes the source unreadable.
https://review.coreboot.org/c/coreboot/+/61682/comment/ba22e738_308d94f1 PS6, Line 77: __f4_dev[i] = get_node_pci(i, 4); So.. FX_DEVS==1.
https://review.coreboot.org/c/coreboot/+/61682/comment/7d57961e_eb7f094f PS6, Line 79: fx_devs = i + 1; It's safe to assume the conditional does not fail, thus fx_devs==1 in this file.
https://review.coreboot.org/c/coreboot/+/61682/comment/f9ed9ba3_210f0b50 PS6, Line 100: dev = __f1_dev[i]; dev = pcidev_on_root(DEV_CDB, 1) ?
File src/northbridge/amd/agesa/family15tn/northbridge.c:
https://review.coreboot.org/c/coreboot/+/61682/comment/a68b9ced_a4b990db PS6, Line 25: #define MAX_NODE_NUMS MAX_NODES In reality 1
src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mntn.h: #define MAX_NODES_SUPPORTED_TN 1
File src/northbridge/amd/agesa/family16kb/northbridge.c:
https://review.coreboot.org/c/coreboot/+/61682/comment/42e03bcb_dcb52c1e PS6, Line 25: #define MAX_NODE_NUMS MAX_NODES In reality 1
src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/KB/mnkb.h: #define MAX_NODES_SUPPORTED_KB 1
File src/northbridge/amd/pi/00730F01/northbridge.c:
https://review.coreboot.org/c/coreboot/+/61682/comment/8344f1c0_2d3ba7c1 PS6, Line 28: #define MAX_NODE_NUMS MAX_NODES src/vendorcode/amd/pi/00730F01/Include/Topology.h:#define MAX_NODES 1
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Kyösti Mälkki (Code Review)