Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67528 )
Change subject: mb/google/dedede/variants/shotzo: Turn off LAN power in S0ix ......................................................................
mb/google/dedede/variants/shotzo: Turn off LAN power in S0ix
Turn off the LAN power which is controlled by GPP_A10 in S0ix states. For an USB device, the S0ix hook is needed for the on/off operationas to take place.
BUG=b:245426120 BRANCH=firmware-dedede-13606.B TEST=emerge-shotzo coreboot check LAN LED off in S0ix states check LAN function ok after suspending 500 loops check SSDT table has MS0X entry Scope (_SB) { Method (MS0X, 1, Serialized) { If ((Arg0 == One)) { _SB.PCI0.CTXS (0x41) } Else { _SB.PCI0.STXS (0x41) } } }
Change-Id: I3fcab4a73239b4f006839c0c81e9b4cc74047b77 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com --- M src/mainboard/google/dedede/variants/shotzo/Makefile.inc A src/mainboard/google/dedede/variants/shotzo/variant.c 2 files changed, 49 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/67528/1
diff --git a/src/mainboard/google/dedede/variants/shotzo/Makefile.inc b/src/mainboard/google/dedede/variants/shotzo/Makefile.inc index eb2c9bc..655f3c8 100644 --- a/src/mainboard/google/dedede/variants/shotzo/Makefile.inc +++ b/src/mainboard/google/dedede/variants/shotzo/Makefile.inc @@ -1,3 +1,4 @@ ## SPDX-License-Identifier: GPL-2.0-or-later
ramstage-y += gpio.c +ramstage-y += variant.c diff --git a/src/mainboard/google/dedede/variants/shotzo/variant.c b/src/mainboard/google/dedede/variants/shotzo/variant.c new file mode 100644 index 0000000..98d4fb1 --- /dev/null +++ b/src/mainboard/google/dedede/variants/shotzo/variant.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <baseboard/variants.h> +#include <variant/gpio.h> +#include <acpi/acpigen.h> + +void variant_generate_s0ix_hook(enum s0ix_entry entry) +{ + if (entry == S0IX_ENTRY) + acpigen_soc_clear_tx_gpio(GPP_A10); + else if (entry == S0IX_EXIT) + acpigen_soc_set_tx_gpio(GPP_A10); +}