Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/29061
Change subject: mediatek/mt8183: Add AUXADC driver ......................................................................
mediatek/mt8183: Add AUXADC driver
We plan to get board id and ram code from AUXADC on Kukui. Add AUXADC driver to support it.
BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui
Change-Id: I121a6a0240f9c517c0cbc07e0c18b09167849ff1 Signed-off-by: jg_poxu jg_poxu@mediatek.com --- M src/soc/mediatek/mt8183/Makefile.inc A src/soc/mediatek/mt8183/auxadc.c M src/soc/mediatek/mt8183/include/soc/addressmap.h A src/soc/mediatek/mt8183/include/soc/auxadc.h 4 files changed, 101 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/29061/1
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index 8fece79..01cf8ef 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -1,5 +1,6 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
+bootblock-y += auxadc.c bootblock-y += bootblock.c bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/pll.c pll.c @@ -14,12 +15,14 @@ decompressor-y += ../common/mmu_operations.c decompressor-y += ../common/timer.c
+verstage-y += auxadc.c verstage-y += ../common/gpio.c gpio.c verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c verstage-y += ../common/timer.c verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += ../common/wdt.c
+romstage-y += auxadc.c romstage-y += ../common/cbmem.c emi.c romstage-y += ../common/gpio.c gpio.c romstage-y += ../common/mmu_operations.c mmu_operations.c @@ -28,6 +31,7 @@ romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += ../common/wdt.c
+ramstage-y += auxadc.c ramstage-y += ../common/cbmem.c emi.c ramstage-y += ../common/gpio.c gpio.c ramstage-y += ../common/mmu_operations.c mmu_operations.c diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c new file mode 100644 index 0000000..e911be3 --- /dev/null +++ b/src/soc/mediatek/mt8183/auxadc.c @@ -0,0 +1,62 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <assert.h> +#include <console/console.h> +#include <delay.h> +#include <soc/addressmap.h> +#include <soc/auxadc.h> +#include <soc/infracfg.h> + +static struct mtk_auxadc_regs *const mtk_auxadc = (void *)AUXADC_BASE; + +static uint32_t auxadc_get_rawdata(int channel) +{ + setbits_le32(&mt8183_infracfg->module_sw_cg_1_clr, 1 << 10); + + int idle_timeout = 300; + while (read32(&mtk_auxadc->auxadc_con2) & 0x1) { + udelay(1000); + assert(--idle_timeout > 0); + } + + clrbits_le32(&mtk_auxadc->auxadc_con1, 1 << channel); + + int data_ready_timeout = 300; + while (0 != (read32(&mtk_auxadc->auxadc_data[channel]) & (1 << 12))) { + udelay(1000); + assert(--data_ready_timeout > 0); + } + + setbits_le32(&mtk_auxadc->auxadc_con1, 1 << channel); + udelay(25); + + while (0 == (read32(&mtk_auxadc->auxadc_data[channel]) & (1 << 12))) { + udelay(1000); + assert(--data_ready_timeout > 0); + } + + uint32_t value = read32(&mtk_auxadc->auxadc_data[channel]) & 0x0FFF; + + setbits_le32(&mt8183_infracfg->module_sw_cg_1_set, 1 << 10); + + return value; +} + +int auxadc_get_voltage(int channel) +{ + return (int)((int64_t)auxadc_get_rawdata(channel) * 1500000 / 4096); +} diff --git a/src/soc/mediatek/mt8183/include/soc/addressmap.h b/src/soc/mediatek/mt8183/include/soc/addressmap.h index de7eb1f..f70f6b2 100644 --- a/src/soc/mediatek/mt8183/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8183/include/soc/addressmap.h @@ -30,6 +30,7 @@ RGU_BASE = IO_PHYS + 0x00007000, GPT_BASE = IO_PHYS + 0x00008000, APMIXED_BASE = IO_PHYS + 0x0000C000, + AUXADC_BASE = IO_PHYS + 0x01001000, UART0_BASE = IO_PHYS + 0x01002000, SPI0_BASE = IO_PHYS + 0x0100A000, SPI1_BASE = IO_PHYS + 0x01010000, diff --git a/src/soc/mediatek/mt8183/include/soc/auxadc.h b/src/soc/mediatek/mt8183/include/soc/auxadc.h new file mode 100644 index 0000000..601a6f1 --- /dev/null +++ b/src/soc/mediatek/mt8183/include/soc/auxadc.h @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _MTK_ADC_H +#define _MTK_ADC_H + +#include <stdint.h> + +typedef struct mtk_auxadc_regs { + uint32_t auxadc_con0; + uint32_t auxadc_con1; + uint32_t auxadc_con1_set; + uint32_t auxadc_con1_clr; + uint32_t auxadc_con2; + uint32_t auxadc_data[16]; + uint32_t reserved[16]; + uint32_t auxadc_misc; +} mtk_auxadc_regs; + +/* This function voltage unit is uvolt */ +int auxadc_get_voltage(int channel); +#endif