[S] Change in coreboot[master]: [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN

[Angel Pons (Code Review)]

Attention is currently required from: Andrey Petrov.

Hello build bot (Jenkins), Andrey Petrov,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/67316

to look at the new patch set (#2).

Change subject: [TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN
......................................................................

[TESTONLY] soc/intel/apollolake: Write to PCI config XHCLKGTEN

Documentation says that the XHCLKGTEN register in the XHCI MMIO space is
a "dummy register, mirror of physical register as XHCLKGTEN". So, try to
write to the XHCLKGTEN register in the XHCI PCI config space.

Change-Id: I05f5490fdb949f68bac16602ab94e0226854b38c
Signed-off-by: Angel Pons 
---
M src/soc/intel/apollolake/chip.c
1 file changed, 21 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/67316/2