Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68025 )
Change subject: mb/google/brya/var/brya0: add new THERMAL FW_CONFIG field ......................................................................
mb/google/brya/var/brya0: add new THERMAL FW_CONFIG field
Add a new THERMAL FW_CONFIG bitfield for describing power consumption category of SoC.
BUG=b:250089101 TEST="emerge-brya coreboot chromeos-bootimage", flash and boot brya0 and skolas to kernel.
Change-Id: Iba3bd87abd4c112ceff4bbe51a7cf9eae3a694f2 Signed-off-by: Nick Vaccaro nvaccaro@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/68025 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-by: YH Lin yueherngl@google.com Reviewed-by: Tarun Tuli taruntuli@google.com --- M src/mainboard/google/brya/variants/brya0/overridetree.cb M src/mainboard/google/brya/variants/skolas/overridetree.cb 2 files changed, 30 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved YH Lin: Looks good to me, but someone else must approve Tarun Tuli: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 63ec9a1..8decc06 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -37,6 +37,10 @@ option HPS_ABSENT 0 option HPS_PRESENT 1 end + field THERMAL 18 18 + option THERMAL_28W 0 + option THERMAL_15W 1 + end end
chip soc/intel/alderlake diff --git a/src/mainboard/google/brya/variants/skolas/overridetree.cb b/src/mainboard/google/brya/variants/skolas/overridetree.cb index bcc66f8..110ca42 100644 --- a/src/mainboard/google/brya/variants/skolas/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas/overridetree.cb @@ -37,6 +37,10 @@ option HPS_ABSENT 0 option HPS_PRESENT 1 end + field THERMAL 18 18 + option THERMAL_28W 0 + option THERMAL_15W 1 + end end
chip soc/intel/alderlake