Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10724
-gerrit
commit 85ada9c13d36ce9765af9825a5ca9aaf1e65513b Author: Patrick Georgi pgeorgi@chromium.org Date: Tue Jun 30 12:48:45 2015 +0200
intel/sandybridge: initialize variable
Otherwise cache_base may be uninitialized.
Change-Id: Ie91f9567cea24114723a5362f52052d6ec22a6b8 Signed-off-by: Patrick Georgi pgeorgi@chromium.org --- src/northbridge/intel/sandybridge/mrccache.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index 94a7c39..f89fc0f 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -72,7 +72,8 @@ static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr) if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) { region_size = region_device_sz(&rdev); *mrc_region_ptr = rdev_mmap_full(&rdev); - } + } else + *mrc_region_ptr = NULL; } else { *mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache", CBFS_TYPE_MRC_CACHE,