Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
mb/google/volteer: add support for ddr4 memory
Add new ddr_memory_cfg structure to support both DDR4 and LPDDR4x memory types.
Change existing variant code to use the new meminit_ddr() call instead of calling meminit_lpddr4x() directly.
BUG=b:161772961 TEST='emerge-volteer coreboot chromeos-bootimage' and verify that volteer still boots. NOTE that this only tests the lpddr4 side of the implementation as I do not have a DDR4 board to test this on.
Change-Id: Id4bca2bfa97530f0d04a0e8d90f01b8281d2aea6 Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/romstage.c M src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/volteer/variants/baseboard/memory.c M src/mainboard/google/volteer/variants/delbin/memory.c M src/mainboard/google/volteer/variants/malefor/memory.c M src/mainboard/google/volteer/variants/terrador/memory.c M src/mainboard/google/volteer/variants/todor/memory.c M src/mainboard/google/volteer/variants/voxel/memory.c 8 files changed, 45 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/44250/1
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 10c424e..8893785 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -15,7 +15,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - const struct lpddr4x_cfg *board_cfg = variant_memory_params(); + const struct ddr_memory_cfg *board_cfg = variant_memory_params(); const struct spd_info spd_info = { .topology = MEMORY_DOWN, .md_spd_loc = SPD_CBFS, @@ -27,7 +27,7 @@ if (fw_config_probe(FW_CONFIG(AUDIO, NONE))) mem_cfg->PchHdaEnable = 0;
- meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated); + meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated); }
bool mainboard_get_dram_part_num(const char **part_num, size_t *len) diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h index 2f90a42..8408198 100644 --- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h @@ -18,7 +18,7 @@
const struct cros_gpio *variant_cros_gpios(size_t *num);
-const struct lpddr4x_cfg *variant_memory_params(void); +const struct ddr_memory_cfg *variant_memory_params(void); int variant_memory_sku(void);
#endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/volteer/variants/baseboard/memory.c b/src/mainboard/google/volteer/variants/baseboard/memory.c index 2da395a..dafeb3b 100644 --- a/src/mainboard/google/volteer/variants/baseboard/memory.c +++ b/src/mainboard/google/volteer/variants/baseboard/memory.c @@ -4,7 +4,7 @@ #include <baseboard/variants.h> #include <gpio.h>
-static const struct lpddr4x_cfg baseboard_memcfg = { +static const struct lpddr4x_cfg baseboard_lpddr4x_memcfg = { /* DQ CPU<>DRAM map */ .dq_map = { [0] = { @@ -56,7 +56,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *__weak variant_memory_params(void) +static const struct ddr_memory_cfg baseboard_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &baseboard_lpddr4x_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { return &baseboard_memcfg; } diff --git a/src/mainboard/google/volteer/variants/delbin/memory.c b/src/mainboard/google/volteer/variants/delbin/memory.c index 788ba51..e7429ca 100644 --- a/src/mainboard/google/volteer/variants/delbin/memory.c +++ b/src/mainboard/google/volteer/variants/delbin/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &delbin_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { - return &delbin_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/malefor/memory.c b/src/mainboard/google/volteer/variants/malefor/memory.c index 5444c6f..2e730a4 100644 --- a/src/mainboard/google/volteer/variants/malefor/memory.c +++ b/src/mainboard/google/volteer/variants/malefor/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &malefor_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { - return &malefor_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/terrador/memory.c b/src/mainboard/google/volteer/variants/terrador/memory.c index 773e885..c61287d 100644 --- a/src/mainboard/google/volteer/variants/terrador/memory.c +++ b/src/mainboard/google/volteer/variants/terrador/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &terrador_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { - return &terrador_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/todor/memory.c b/src/mainboard/google/volteer/variants/todor/memory.c index 5adf80c..129cd10 100644 --- a/src/mainboard/google/volteer/variants/todor/memory.c +++ b/src/mainboard/google/volteer/variants/todor/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &todor_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { - return &todor_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/voxel/memory.c b/src/mainboard/google/volteer/variants/voxel/memory.c index 455b180..0c7310e 100644 --- a/src/mainboard/google/volteer/variants/voxel/memory.c +++ b/src/mainboard/google/volteer/variants/voxel/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &voxel_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { - return &voxel_memcfg; + return &board_memcfg; }
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
Patch Set 1: Code-Review+2
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
Patch Set 1: Code-Review-1
(1 comment)
https://review.coreboot.org/c/coreboot/+/44250/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/delbin/memory.c:
https://review.coreboot.org/c/coreboot/+/44250/1/src/mainboard/google/voltee... PS1, Line 62: __weak we don't want __weak on variants, do we? which one will the linker choose?
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
Patch Set 1: -Code-Review
(1 comment)
https://review.coreboot.org/c/coreboot/+/44250/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/delbin/memory.c:
https://review.coreboot.org/c/coreboot/+/44250/1/src/mainboard/google/voltee... PS1, Line 62: __weak
we don't want __weak on variants, do we? which one will the linker choose?
Good catch, only want that on the baseboard.
Hello build bot (Jenkins), Furquan Shaikh, Caveh Jalali, Ravishankar Sarawadi, Duncan Laurie, Derek Huang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44250
to look at the new patch set (#2).
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
mb/google/volteer: add support for ddr4 memory
Add new ddr_memory_cfg structure to support both DDR4 and LPDDR4x memory types.
Change existing variant code to use the new meminit_ddr() call instead of calling meminit_lpddr4x() directly.
BUG=b:161772961 TEST='emerge-volteer coreboot chromeos-bootimage' and verify that volteer still boots. NOTE that this only tests the lpddr4 side of the implementation as I do not have a DDR4 board to test this on.
Change-Id: Id4bca2bfa97530f0d04a0e8d90f01b8281d2aea6 Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/romstage.c M src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/volteer/variants/baseboard/memory.c M src/mainboard/google/volteer/variants/delbin/memory.c M src/mainboard/google/volteer/variants/malefor/memory.c M src/mainboard/google/volteer/variants/terrador/memory.c M src/mainboard/google/volteer/variants/todor/memory.c M src/mainboard/google/volteer/variants/voxel/memory.c 8 files changed, 45 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/44250/2
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44250/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/delbin/memory.c:
https://review.coreboot.org/c/coreboot/+/44250/1/src/mainboard/google/voltee... PS1, Line 62: __weak
Good catch, only want that on the baseboard.
Done
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
Patch Set 2: Code-Review+2
Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44250 )
Change subject: mb/google/volteer: add support for ddr4 memory ......................................................................
mb/google/volteer: add support for ddr4 memory
Add new ddr_memory_cfg structure to support both DDR4 and LPDDR4x memory types.
Change existing variant code to use the new meminit_ddr() call instead of calling meminit_lpddr4x() directly.
BUG=b:161772961 TEST='emerge-volteer coreboot chromeos-bootimage' and verify that volteer still boots. NOTE that this only tests the lpddr4 side of the implementation as I do not have a DDR4 board to test this on.
Change-Id: Id4bca2bfa97530f0d04a0e8d90f01b8281d2aea6 Signed-off-by: Nick Vaccaro nvaccaro@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44250 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Caveh Jalali caveh@chromium.org --- M src/mainboard/google/volteer/romstage.c M src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/volteer/variants/baseboard/memory.c M src/mainboard/google/volteer/variants/delbin/memory.c M src/mainboard/google/volteer/variants/malefor/memory.c M src/mainboard/google/volteer/variants/terrador/memory.c M src/mainboard/google/volteer/variants/todor/memory.c M src/mainboard/google/volteer/variants/voxel/memory.c 8 files changed, 45 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Caveh Jalali: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 10c424e..8893785 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -15,7 +15,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - const struct lpddr4x_cfg *board_cfg = variant_memory_params(); + const struct ddr_memory_cfg *board_cfg = variant_memory_params(); const struct spd_info spd_info = { .topology = MEMORY_DOWN, .md_spd_loc = SPD_CBFS, @@ -27,7 +27,7 @@ if (fw_config_probe(FW_CONFIG(AUDIO, NONE))) mem_cfg->PchHdaEnable = 0;
- meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated); + meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated); }
bool mainboard_get_dram_part_num(const char **part_num, size_t *len) diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h index 2f90a42..8408198 100644 --- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h @@ -18,7 +18,7 @@
const struct cros_gpio *variant_cros_gpios(size_t *num);
-const struct lpddr4x_cfg *variant_memory_params(void); +const struct ddr_memory_cfg *variant_memory_params(void); int variant_memory_sku(void);
#endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/volteer/variants/baseboard/memory.c b/src/mainboard/google/volteer/variants/baseboard/memory.c index 2da395a..dafeb3b 100644 --- a/src/mainboard/google/volteer/variants/baseboard/memory.c +++ b/src/mainboard/google/volteer/variants/baseboard/memory.c @@ -4,7 +4,7 @@ #include <baseboard/variants.h> #include <gpio.h>
-static const struct lpddr4x_cfg baseboard_memcfg = { +static const struct lpddr4x_cfg baseboard_lpddr4x_memcfg = { /* DQ CPU<>DRAM map */ .dq_map = { [0] = { @@ -56,7 +56,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *__weak variant_memory_params(void) +static const struct ddr_memory_cfg baseboard_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &baseboard_lpddr4x_memcfg +}; + +const struct ddr_memory_cfg *__weak variant_memory_params(void) { return &baseboard_memcfg; } diff --git a/src/mainboard/google/volteer/variants/delbin/memory.c b/src/mainboard/google/volteer/variants/delbin/memory.c index 788ba51..9d8ad40 100644 --- a/src/mainboard/google/volteer/variants/delbin/memory.c +++ b/src/mainboard/google/volteer/variants/delbin/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &delbin_memcfg +}; + +const struct ddr_memory_cfg *variant_memory_params(void) { - return &delbin_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/malefor/memory.c b/src/mainboard/google/volteer/variants/malefor/memory.c index 5444c6f..2c879e0 100644 --- a/src/mainboard/google/volteer/variants/malefor/memory.c +++ b/src/mainboard/google/volteer/variants/malefor/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &malefor_memcfg +}; + +const struct ddr_memory_cfg *variant_memory_params(void) { - return &malefor_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/terrador/memory.c b/src/mainboard/google/volteer/variants/terrador/memory.c index 773e885..7d95658 100644 --- a/src/mainboard/google/volteer/variants/terrador/memory.c +++ b/src/mainboard/google/volteer/variants/terrador/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &terrador_memcfg +}; + +const struct ddr_memory_cfg *variant_memory_params(void) { - return &terrador_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/todor/memory.c b/src/mainboard/google/volteer/variants/todor/memory.c index 5adf80c..c8b4ab4 100644 --- a/src/mainboard/google/volteer/variants/todor/memory.c +++ b/src/mainboard/google/volteer/variants/todor/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &todor_memcfg +}; + +const struct ddr_memory_cfg *variant_memory_params(void) { - return &todor_memcfg; + return &board_memcfg; } diff --git a/src/mainboard/google/volteer/variants/voxel/memory.c b/src/mainboard/google/volteer/variants/voxel/memory.c index 455b180..40b1086 100644 --- a/src/mainboard/google/volteer/variants/voxel/memory.c +++ b/src/mainboard/google/volteer/variants/voxel/memory.c @@ -54,7 +54,12 @@ .ect = 1, /* Enable Early Command Training */ };
-const struct lpddr4x_cfg *variant_memory_params(void) +static const struct ddr_memory_cfg board_memcfg = { + .mem_type = MEMTYPE_LPDDR4X, + .lpddr4_cfg = &voxel_memcfg +}; + +const struct ddr_memory_cfg *variant_memory_params(void) { - return &voxel_memcfg; + return &board_memcfg; }
-
Caveh Jalali (Code Review) -
Duncan Laurie (Code Review)
-
Nick Vaccaro (Code Review)