Change in coreboot[master]: soc/intel/skl,acpi/acpigen: convert global CPPC package to local one

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46465 )

Change subject: soc/intel/skl,acpi/acpigen: convert global CPPC package to local one
......................................................................

soc/intel/skl,acpi/acpigen: convert global CPPC package to local one

Move the global CPPC package \GCPC to the first logical core CP00 and
adapt the reference in the other cores. This is cleaner and avoids
confusion.

Test: dumped SSDT on Supermicro X11SSM-F and verified decompiled version

Change-Id: I40b9fd644622196da434128895eb6fb96fdf254d
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46465
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/acpi/acpigen.c
M src/soc/intel/skylake/acpi.c
2 files changed, 22 insertions(+), 11 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c
index 7b72584..4a7dfc9 100644
--- a/src/acpi/acpigen.c
+++ b/src/acpi/acpigen.c
@@ -10,6 +10,8 @@

#define ACPIGEN_MAXLEN 0xfffff

+#define CPPC_PACKAGE_NAME "GCPC"
+
 #include <lib.h>
 #include <string.h>
 #include <acpi/acpigen.h>
@@ -1578,8 +1580,6 @@
    acpigen_pop_len();	/* Method _DSM */
 }

-#define CPPC_PACKAGE_NAME "\GCPC"
-
 void acpigen_write_CPPC_package(const struct cppc_config *config)
 {
    u32 i;
@@ -1621,9 +1621,12 @@

void acpigen_write_CPPC_method(void)
 {
+	char pscope[16];
+	snprintf(pscope, sizeof(pscope), CONFIG_ACPI_CPU_STRING "." CPPC_PACKAGE_NAME, 0);
+
    acpigen_write_method("_CPC", 0);
    acpigen_emit_byte(RETURN_OP);
-	acpigen_emit_namestring(CPPC_PACKAGE_NAME);
+	acpigen_emit_namestring(pscope);
    acpigen_pop_len();
 }

diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 637092b..743b33f 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -369,6 +369,19 @@
    acpigen_pop_len();
 }

+static void generate_cppc_entries(int core_id)
+{
+	/* Generate GCPC table in first logical core */
+	if (core_id == 0) {
+		struct cppc_config cppc_config;
+		cpu_init_cppc_config(&cppc_config, CPPC_VERSION_2);
+		acpigen_write_CPPC_package(&cppc_config);
+	}
+
+	/* Write _CST entry for each logical core */
+	acpigen_write_CPPC_method();
+}
+
 void generate_cpu_entries(const struct device *device)
 {
    int core_id, cpu_id, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6;
@@ -377,16 +390,11 @@
    int numcpus = totalcores/cores_per_package;
    config_t *config = config_of_soc();
    int is_s0ix_enable = config->s0ix_enable;
+	const bool isst_supported = cpuid_eax(6) & CPUID_6_EAX_ISST;

printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n",
           numcpus, cores_per_package);

-	if (cpuid_eax(6) & CPUID_6_EAX_ISST) {
-		struct cppc_config cppc_config;
-		cpu_init_cppc_config(&cppc_config, 2 /* version 2 */);
-		acpigen_write_CPPC_package(&cppc_config);
-	}
-
    for (cpu_id = 0; cpu_id < numcpus; cpu_id++) {
    	for (core_id = 0; core_id < cores_per_package; core_id++) {
    		if (core_id > 0) {
@@ -407,8 +415,8 @@
    					cores_per_package);
    		}

-			if (cpuid_eax(6) & CPUID_6_EAX_ISST)
-				acpigen_write_CPPC_method();
+			if (isst_supported)
+				generate_cppc_entries(core_id);

acpigen_pop_len();
    	}