Attention is currently required from: Ashish Kumar Mishra, Ashish Kumar Mishra, Bernardo Perez Priego, Karthik Ramasubramanian, Li1 Feng, Shelley Chen, Yuval Peress.
Hello Ashish Kumar Mishra, Ashish Kumar Mishra, Bernardo Perez Priego, Shelley Chen, Tanu Malhotra, Yuval Peress, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80773?usp=email
to look at the new patch set (#7).
The following approvals got outdated and were removed: Code-Review+1 by Ashish Kumar Mishra, Code-Review+1 by Yuval Peress, Verified+1 by build bot (Jenkins)
Change subject: mb/google/brox: support ISH ......................................................................
mb/google/brox: support ISH
Set FW_CONFIG bit 21 to enable ISH PCI device and define ISH main firmware name so ISH shim loader can load firmware from file system.
ISH also need to be enabled if STORAGE_UFS is set.
BUG=b:280329972 TEST= Set bit CBI FW_CONFIG bit 21 Boot Brox board, check that ISH is enabled and loaded lspci shows: 00:12.0 Serial controller: Intel Corporation Alder Lake-P Integrated Sensor Hub (rev 01).
Change-Id: Iadc5108c62737d27642a6948c00b5c122541aaba Signed-off-by: Li Feng li1.feng@intel.com --- M src/mainboard/google/brox/variants/baseboard/brox/gpio.c M src/mainboard/google/brox/variants/brox/fw_config.c M src/mainboard/google/brox/variants/brox/overridetree.cb 3 files changed, 39 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/80773/7
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Li1 Feng (Code Review)