[XL] Change in coreboot[main]: mb/intel/ptlrvp: Add Intel Panther Lake RVP as copy of google/fatcat
Attention is currently required from: Bora Guvendik, Jamie Ryu, Jérémy Compostella, Paul Menzel, Zhixing Ma.
Cliff Huang has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84564?usp=email )
Change subject: mb/intel/ptlrvp: Add Intel Panther Lake RVP as copy of google/fatcat ......................................................................
Patch Set 7:
(5 comments)
File src/mainboard/intel/ptlrvp/Kconfig:
https://review.coreboot.org/c/coreboot/+/84564/comment/cc7d7c61_10c3a34d?usp... : PS6, Line 2:
This Change List (CL) provides the foundational support for our PTLRVP […]
Acknowledged
https://review.coreboot.org/c/coreboot/+/84564/comment/939d2258_796a91e4?usp... : PS6, Line 3: config BOARD_INTEL_PTLRVP_COMMON
Could you clarify? I do not comprehend your comment.
Currently, we are using fsp_param.c. We used to select PLATFORM_USES_FSP_CONFIGURATION_BLOCKS to use fill_policy.c. Can we add an comment for using this flag so that we will revisit it? This will our original approach for PTL platform.
https://review.coreboot.org/c/coreboot/+/84564/comment/c3110f52_e37c62ec?usp... : PS6, Line 5: select BOARD_ROMSIZE_KB_32768
This was added after e2ea7f22c6355d15515c049ca0dc4352173a0c01. This […]
Acknowledged
File src/mainboard/intel/ptlrvp/variants/baseboard/ptlrvp/include/baseboard/ec.h:
https://review.coreboot.org/c/coreboot/+/84564/comment/9277bd15_1f82ffa7?usp... : PS6, Line 78: #define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp / wake support */
You are correct, we probably do not. I removed them.
Acknowledged
File src/mainboard/intel/ptlrvp/variants/ptlrvp/gpio.c:
https://review.coreboot.org/c/coreboot/+/84564/comment/4961c8ab_a2525196?usp... : PS6, Line 199: /* GPP_E07: Not used */
I assumed that on ptlrvp we are in the CONFIG_BOARD_GOOGLE_FATCAT and I therefore set it as NC. […]
Acknowledged
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Cliff Huang (Code Review)