Change in coreboot[master]: mb/intel/adlrvp: Update iDisp Link UPD settings

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51353 )

Change subject: mb/intel/adlrvp: Update iDisp Link UPD settings
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mb/intel/adlrvp: Update iDisp Link UPD settings

This changes updates the iDisp-Link T-mode to 8T required for ADL-M.
The update is made because the HW on ADL now supports 8T mode.

BUG=None
TEST= build and boot ADL-M RVP and verify HDMI/DP audio playback.

Signed-off-by: Francois Toguo 
Change-Id: I9d0bf7dc76348f7e184e8496f042badc30bf3211
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51353
Reviewed-by: Furquan Shaikh 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/intel/adlrvp/devicetree_m.cb
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved
  Angel Pons: Looks good to me, but someone else must approve

diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb
index 3094010..7c69163 100644
--- a/src/mainboard/intel/adlrvp/devicetree_m.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_m.cb
@@ -130,7 +130,7 @@
    register "PchHdaAudioLinkSndwEnable[0]" = "1"
    register "PchHdaAudioLinkSndwEnable[1]" = "1"
    # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T
-	register "PchHdaIDispLinkTmode" = "2"
+	register "PchHdaIDispLinkTmode" = "3"
    # iDisp-Link Freq 4: 96MHz, 3: 48MHz.
    register "PchHdaIDispLinkFrequency" = "4"
    # Not disconnected/enumerable