Change in coreboot[master]: mb/google/poppy/variants/nocturne: fix FPMCU IRQ sensitivity

[Vincent Palatin (Code Review)]

Vincent Palatin has uploaded this change for review. ( https://review.coreboot.org/27221

Change subject: mb/google/poppy/variants/nocturne: fix FPMCU IRQ sensitivity
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mb/google/poppy/variants/nocturne: fix FPMCU IRQ sensitivity

the FPMCU_INT_L on GPP_C11 active low but the kernel irq handler is
defined as IRQF_TRIGGER_LOW, so do not invert it twice.

BRANCH=poppy
BUG=b:78613978
TEST=On Nocturne, the 'cros_ec' IRQ count in /proc/interrupts does not
increment wildly.

Change-Id: I56c13c797b133dd22669a2299bcd16ef14eed335
Signed-off-by: Vincent Palatin 
---
M src/mainboard/google/poppy/variants/nocturne/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/27221/1

diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c
index f602479..b6327d0 100644
--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c
+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c
@@ -135,7 +135,7 @@
    /* C10 : UART0_RTS# ==> PCH_FPMCU_RST_ODL */
    PAD_CFG_GPO(GPP_C10, 0, DEEP),
    /* C11 : UART0_CTS# ==> FPMCU_INT */
-	PAD_CFG_GPI_APIC_INVERT(GPP_C11, NONE, DEEP),
+	PAD_CFG_GPI_APIC(GPP_C11, NONE, DEEP),
    /* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */
    PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP),
    /* C13 : UART1_TXD ==> PCH_MEM_CONFIG[1] */