New patch to review for coreboot: braswell: remove CBFS_SIZE option in SoC directory

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11410

-gerrit

commit 049547843c8d0f74469258caa618f8e47f09dccd
Author: Aaron Durbin 
Date:   Thu Jul 30 13:30:03 2015 -0500

braswell: remove CBFS_SIZE option in SoC directory

CBFS_SIZE is living as a mainboard attribute. Because
    of the Kconfig include ordering the SoC *cannot* set
    the default.

BUG=chrome-os-partner:43419
    BRANCH=None
    TEST=None

Change-Id: If34e8fd965573fdc7f57b63201dbcb5256e132d6
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: a820b11a0aa3b820c79b1f76b15370d969153175
    Original-Change-Id: I7ba637e66878f5ae9caedb63fdd37ed7e375224e
    Original-Signed-off-by: Aaron Durbin 
    Original-Reviewed-on: https://chromium-review.googlesource.com/289832
    Original-Reviewed-by: Martin Roth 
    Original-Reviewed-by: Patrick Georgi 
---
 src/soc/intel/braswell/Kconfig | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 4f7ed6a..a3f6025 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -117,18 +117,6 @@ config RESET_ON_INVALID_RAMSTAGE_CACHE
      the system will reset otherwise the ramstage will be reloaded from
      cbfs.

-config CBFS_SIZE
-	hex "Size of CBFS filesystem in ROM"
-	default 0x100000
-	help
-	  The firmware image has to store a lot more than just coreboot,
-	  including:
-	   - a firmware descriptor
-	   - Intel Management Engine firmware
-	   - MRC cache information
-	  This option allows to limit the size of the CBFS portion in the
-	  firmware image.
-
 config LOCK_MANAGEMENT_ENGINE
    bool "Lock Management Engine section"
    default n