[XS] Change in coreboot[main]: soc/intel/alderlake: Change the maximum C state to C8

[Paul Menzel (Code Review)]

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Michał Żygowski, Nick Vaccaro, Sean Rhodes.

Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84622?usp=email )

Change subject: soc/intel/alderlake: Change the maximum C state to C8
......................................................................

Patch Set 6:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84622/comment/cf013e89_601a04a6?usp... :
PS6, Line 11:     MWAIT C-state 0x33 not supported by HW (0x1010)
Also, maybe say, that the error is shown because of the substate:

```
        /* If the HW does not support any sub-states in this C-state */
        if (num_cstate_subtype == 0) {
                pr_warn(FW_BUG "ACPI MWAIT C-state 0x%x not supported by HW (0x%x)\n",
                                cx->address, edx_part);
                retval = -1;
                goto out;
        }
```

Is this was the S in C7S means?

https://review.coreboot.org/c/coreboot/+/84622/comment/9b7a5eda_b513c09b?usp... :
PS6, Line 9: Change the maximum C state allowed when S0ix isn't used to C8
           : to solve the following error:
           :     MWAIT C-state 0x33 not supported by HW (0x1010)
Without reading the diff, I would have thought you decrease it from C10 or so to C8. But you kind of increase it. Maybe this could be made more clear.

https://review.coreboot.org/c/coreboot/+/84622/comment/a89beab3_f196fbb0?usp... :
PS6, Line 13: Tested on `starbook_adl` with Ubuntu 24.04 by booting, and
            : performing multiple S3 cycles.
Did you check with PowerTOP or turbostat if C8 was reached before and is now?