Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74231 )
Change subject: soc/intel/xeon_sp/acpi: Fix _OSC method ......................................................................
soc/intel/xeon_sp/acpi: Fix _OSC method
Fix a couple of bugs in the _OSC method for handling "PCI Host Bridge Device" on Xeon-SP.
- Drop the Sleep. The code doesn't write to hardware at all, so there's no need to sleep here. - Make sure that the number of DWORD passed in Arg2 is at least 3. The existing check was useless as it would not create the DWordField, but then use it anyways. - Add check for CXL 2 device method calls which provide a 5 DWORD long buffer to prevent buffer overflows when invoking the "PCI Host Bridge Device" method.
Test: Boot on Archer City and confirm that no ACPI errors are reported for _OSC.
Change-Id: Ide598e386c30ced24e4f96c37f2b4a609ac33441 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/xeon_sp/acpi/iiostack.asl M src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl M src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl 3 files changed, 54 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/74231/1
diff --git a/src/soc/intel/xeon_sp/acpi/iiostack.asl b/src/soc/intel/xeon_sp/acpi/iiostack.asl index 91a5c6c..390ff3c 100644 --- a/src/soc/intel/xeon_sp/acpi/iiostack.asl +++ b/src/soc/intel/xeon_sp/acpi/iiostack.asl @@ -27,11 +27,13 @@ CreateDWordField (Arg3, 0x00, CDW1) \ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) \ { \ - CreateDWordField (Arg3, 0x04, CDW2) \ - If ((Arg2 > 0x02)) \ + If (Arg2 < 0x03) \ { \ - CreateDWordField (Arg3, 0x08, CDW3) \ + CDW1 |= 0x02 /* Unknown failure */ \ + Return (Arg3) \ } \ + CreateDWordField (Arg3, 0x04, CDW2) \ + CreateDWordField (Arg3, 0x08, CDW3) \ SUPP = CDW2 \ CTRL = CDW3 \ If ((AHPE || ((SUPP & 0x16) != 0x16))) \ diff --git a/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl b/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl index 299247f..ccd6234 100644 --- a/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl +++ b/src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl @@ -43,21 +43,26 @@ || Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc")) /* CXL */ { - CreateDWordField (Arg3, 0x04, CDW2) - If (Arg2 > 0x02) + If (Arg2 < 0x03) /* Number of DWORDs in Arg3 must be at least 3 */ { - CreateDWordField (Arg3, 0x08, CDW3) - CreateDWordField (Arg3, 0x0C, CDW4) - CreateDWordField (Arg3, 0x10, CDW5) + CDW1 |= 0x02 /* Unknown failure */ + Return (Arg3) } + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 CTRL = CDW3 - SUPC = CDW4 - CTRC = CDW5 + If (Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc")) + { + CreateDWordField (Arg3, 0x0C, CDW4) + CreateDWordField (Arg3, 0x10, CDW5) + SUPC = CDW4 + CTRC = CDW5 + } If (SUPP & 0x16 != 0x16) { CTRL &= 0x1E - Sleep (0x03E8) } /* Never allow SHPC (no SHPC controller in system) */ CTRL &= 0x1D @@ -72,7 +77,10 @@ CDW1 |= 0x10 } CDW3 = CTRL - CDW5 = CTRC + If (Arg0 == ToUUID ("68f2d50b-c469-4d8a-bd3d-941a103fd3fc")) + { + CDW5 = CTRC + } Return (Arg3) } Else diff --git a/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl b/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl index 7988a16..a369b11 100644 --- a/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl +++ b/src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl @@ -35,17 +35,19 @@ CreateDWordField (Arg3, 0x00, CDW1) If (Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */) { - CreateDWordField (Arg3, 0x04, CDW2) - If (Arg2 > 0x02) + If (Arg2 < 0x03) /* Number of DWORDs in Arg3 must be at least 3 */ { - CreateDWordField (Arg3, 0x08, CDW3) + CDW1 |= 0x02 /* Unknown failure */ + Return (Arg3) } + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + SUPP = CDW2 CTRL = CDW3 If (SUPP & 0x16 != 0x16) { CTRL &= 0x1E - Sleep (0x03E8) } /* Never allow SHPC (no SHPC controller in system) */ CTRL &= 0x1D
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Patrick Rudolph (Code Review)