Change in coreboot[master]: soc/intel/common/block/gpio: Port gpio code from Apollolake ... - coreboot-gerrit

1 Jun 2017


      Hannah Williams has posted comments on this change. ( https://review.coreboot.org/19759 )
Change subject: soc/intel/common/block/gpio: Port gpio code from Apollolake to common
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Patch Set 14:
(1 comment)
https://review.coreboot.org/#/c/19759/19/src/soc/intel/common/block/include/...
File src/soc/intel/common/block/include/intelblocks/gpio_defs.h:
Line 29: #define PAD_CFG0_RX_STATE		(1 << PAD_CFG0_RX_STATE_BIT)
...
This shouldn't be exposed to the user of this API. Also what about the TOL
yes I was going to get APL and GLK working and then go to SKL - so as part of CNL using common GPIO we can address that
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Gerrit-Change-Id: Ic48401e92103ff0ec278fb69a3d304148a2d79aa
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