Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80294?usp=email )
Change subject: soc/amd/phoenix: add get_pci_routing_table stub for non-FSP case ......................................................................
soc/amd/phoenix: add get_pci_routing_table stub for non-FSP case
In the FSP case we get this info via a HOB. It's currently unclear if we'll get a data structure for this from openSIL or if we'll end up being able to just read the configuration fro the hardware, so add a get_pci_routing_table stub for now to be able to build.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I5003e287d6a3a9320922beaffff8a3a846531e14 --- M src/soc/amd/phoenix/Makefile.mk A src/soc/amd/phoenix/pci_irq_routing.c 2 files changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/80294/1
diff --git a/src/soc/amd/phoenix/Makefile.mk b/src/soc/amd/phoenix/Makefile.mk index 9c775cc..be0a022 100644 --- a/src/soc/amd/phoenix/Makefile.mk +++ b/src/soc/amd/phoenix/Makefile.mk @@ -32,6 +32,7 @@ ramstage-y += graphics.c ramstage-y += mca.c ramstage-y += memmap.c +ramstage-$(CONFIG_SOC_AMD_PHOENIX_OPENSIL) += pci_irq_routing.c ramstage-y += root_complex.c ramstage-y += soc_util.c ramstage-y += xhci.c diff --git a/src/soc/amd/phoenix/pci_irq_routing.c b/src/soc/amd/phoenix/pci_irq_routing.c new file mode 100644 index 0000000..5c891c2 --- /dev/null +++ b/src/soc/amd/phoenix/pci_irq_routing.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/amd_pci_util.h> +#include <console/console.h> +#include <types.h> + +const struct pci_routing_info *get_pci_routing_table(size_t *entries) +{ + /* TODO: still needs to be implemented for the non-FSP case */ + printk(BIOS_NOTICE, "%s stub: returning empty IRQ routing table\n", __func__); + + *entries = 0; + return NULL; +}