Patrick Rudolph has submitted this change and it was merged. ( https://review.coreboot.org/19689 )
Change subject: nb/intel/sandybridge: Hide additional nb devices ......................................................................
nb/intel/sandybridge: Hide additional nb devices
Hide device 4 and device 7 if disabled. Allows devicetree settings to take effect.
Tested on Lenovo T430.
Change-Id: I64a19e2bbdb1640e1d732f6e4486f73cbb0bda81 Signed-off-by: Patrick Rudolph siro@das-labor.org Reviewed-on: https://review.coreboot.org/19689 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M src/northbridge/intel/sandybridge/northbridge.c M src/northbridge/intel/sandybridge/sandybridge.h 2 files changed, 12 insertions(+), 0 deletions(-)
Approvals: Arthur Heymans: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve build bot (Jenkins): Verified
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 562e7f2..5c5f41a 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -357,11 +357,21 @@ printk(BIOS_DEBUG, "Disabling IGD.\n"); reg &= ~DEVEN_IGD; } + dev = dev_find_slot(0, PCI_DEVFN(4, 0)); + if (!dev || !dev->enabled) { + printk(BIOS_DEBUG, "Disabling Device 4.\n"); + reg &= ~DEVEN_D4EN; + } dev = dev_find_slot(0, PCI_DEVFN(6, 0)); if (!dev || !dev->enabled) { printk(BIOS_DEBUG, "Disabling PEG60.\n"); reg &= ~DEVEN_PEG60; } + dev = dev_find_slot(0, PCI_DEVFN(7, 0)); + if (!dev || !dev->enabled) { + printk(BIOS_DEBUG, "Disabling Device 7.\n"); + reg &= ~DEVEN_D7EN; + }
dev = dev_find_slot(0, PCI_DEVFN(0, 0)); pci_write_config32(dev, DEVEN, reg); diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 8d2ae85..bc659be 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -75,7 +75,9 @@ #define GGC 0x50 /* GMCH Graphics Control */
#define DEVEN 0x54 /* Device Enable */ +#define DEVEN_D7EN (1 << 14) #define DEVEN_PEG60 (1 << 13) +#define DEVEN_D4EN (1 << 7) #define DEVEN_IGD (1 << 4) #define DEVEN_PEG10 (1 << 3) #define DEVEN_PEG11 (1 << 2)