Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55205 )
Change subject: mb/intel/adlrvp: Use device aliases ......................................................................
mb/intel/adlrvp: Use device aliases
Use the device aliases provided by alderlake chipset.cb instead of the raw pci device+function. Take advantage of the default states in chipset.cb and only list the devices that are enabled for all different adlrvp boards.
TEST=Dump devicetree device enable list without and with this CL, no difference observed.
Change-Id: Ib9e82d953416c076588974f3167d00ae96f01bb5 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/devicetree.cb M src/mainboard/intel/adlrvp/devicetree_m.cb M src/mainboard/intel/adlrvp/variants/adlrvp_m_ext_ec/overridetree.cb M src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb 4 files changed, 88 insertions(+), 167 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/55205/1
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index 23913cc..cd6c265 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -204,10 +204,9 @@ }"
device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 01.0 on end # PEG10 - device pci 02.0 on end # Graphics - device pci 04.0 on + device ref pcie5 on end + device ref igpu on end + device ref dtt on chip drivers/intel/dptf
## sensor information @@ -301,38 +300,19 @@
device generic 0 on end end - end # DPTF - device pci 05.0 on end # IPU - device pci 06.0 on end # PEG60 - device pci 06.2 on end # PEG62 - device pci 07.0 on end # TBT_PCIe0 - device pci 07.1 on end # TBT_PCIe1 - device pci 07.2 on end # TBT_PCIe2 - device pci 07.3 on end # TBT_PCIe3 - device pci 08.0 off end # GNA - device pci 09.0 off end # NPK - device pci 0a.0 off end # Crash-log SRAM - device pci 0d.0 on end # USB xHCI - device pci 0d.1 on end # USB xDCI (OTG) - device pci 0d.2 on end # TBT DMA0 - device pci 0d.3 on end # TBT DMA1 - device pci 0e.0 off end # VMD - device pci 10.0 off end - device pci 10.1 off end - device pci 10.6 off end # THC0 - device pci 10.7 off end # THC1 - device pci 11.0 off end - device pci 11.1 off end - device pci 11.2 off end - device pci 11.3 off end - device pci 11.4 off end - device pci 11.5 off end - device pci 12.0 off end # SensorHUB - device pci 12.5 off end - device pci 12.6 off end # GSPI2 - device pci 13.0 off end # GSPI3 - device pci 13.1 off end - device pci 14.0 on + end + device ref ipu on end + device ref pcie4_0 on end + device ref pcie4_1 on end + device ref tbt_pcie_rp0 on end + device ref tbt_pcie_rp1 on end + device ref tbt_pcie_rp2 on end + device ref tbt_pcie_rp3 on end + device ref tcss_xhci on end + device ref tcss_xdci on end + device ref tcss_dma0 on end + device ref tcss_dma1 on end + device ref xhci on chip drivers/usb/acpi register "desc" = ""Root Hub"" register "type" = "UPC_TYPE_HUB" @@ -344,49 +324,34 @@ end end end - end # USB3.1 xHCI - device pci 14.1 off end # USB3.1 xDCI - device pci 14.2 off end # Shared RAM - device pci 14.3 on + end + device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device generic 0 on end end - end # CNVi: WiFi - device pci 15.0 on end # I2C0 - device pci 15.1 on end # I2C1 - device pci 15.2 on end # I2C2 - device pci 15.3 on end # I2C3 - device pci 16.0 on end # HECI1 - device pci 16.1 off end # HECI2 - device pci 16.2 off end # CSME - device pci 16.3 off end # CSME - device pci 16.4 off end # HECI3 - device pci 16.5 off end # HECI4 - device pci 17.0 on end # SATA - device pci 19.0 off end # I2C4 - device pci 19.1 on end # I2C5 - device pci 19.2 off end # UART2 - device pci 1c.0 on end # RP1 - device pci 1c.1 off end # RP2 - device pci 1c.2 on end # RP3 # W/A to FSP issue - device pci 1c.3 on end # RP4 # W/A to FSP issue - device pci 1c.4 on end # RP5 - device pci 1c.5 on end # RP6 - device pci 1c.6 off end # RP7 - device pci 1c.7 on end # RP8 - device pci 1d.0 on end # RP9 - device pci 1d.1 off end # RP10 - device pci 1d.2 on end # RP11 - device pci 1d.3 off end # RP12 - device pci 1e.0 on end # UART0 - device pci 1e.1 off end # UART1 - device pci 1e.2 on end # GSPI0 - device pci 1e.3 off end # GSPI1 - device pci 1f.0 on end # eSPI - device pci 1f.1 on end # P2SB - device pci 1f.2 hidden end # PMC - device pci 1f.3 on + end + device ref i2c0 on end + device ref i2c1 on end + device ref i2c2 on end + device ref i2c3 on end + device ref heci1 on end + device ref sata on end + device ref i2c5 on end + device ref pcie_rp1 on end + device ref pcie_rp3 on end + device ref pcie_rp4 on end + device ref pcie_rp5 on end + device ref pcie_rp6 on end + device ref pcie_rp8 on end + device ref pcie_rp9 on end + device ref pcie_rp11 on end + device ref uart0 on end + device ref gspi0 on end + device ref gspi1 on end + device ref pch_espi on end + device ref p2sb on end + device ref hda on chip drivers/intel/soundwire device generic 0 on chip drivers/soundwire/alc711 @@ -396,10 +361,8 @@ end end end - end # Intel Audio SNDW - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # SPI - device pci 1f.6 off end # GbE - device pci 1f.7 off end # TH + end + device ref smbus on end + device ref fast_spi on end end end diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index 4e4135f..e33eafe 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -153,41 +153,17 @@ }"
device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 01.0 on end # PEG10 - device pci 02.0 on end # Graphics - device pci 04.0 on end # DPTF - device pci 05.0 on end # IPU - device pci 06.0 on end # PEG60 - device pci 06.2 on end # PEG62 - device pci 07.0 on end # TBT_PCIe0 - device pci 07.1 on end # TBT_PCIe1 - device pci 07.2 off end # TBT_PCIe2 - device pci 07.3 off end # TBT_PCIe3 - device pci 08.0 off end # GNA - device pci 09.0 off end # NPK - device pci 0a.0 off end # Crash-log SRAM - device pci 0d.0 on end # USB xHCI - device pci 0d.1 off end # USB xDCI (OTG) - device pci 0d.2 on end # TBT DMA0 - device pci 0d.3 off end # TBT DMA1 - device pci 0e.0 off end # VMD - device pci 10.0 off end - device pci 10.1 off end - device pci 10.6 off end # THC0 - device pci 10.7 off end # THC1 - device pci 11.0 off end - device pci 11.1 off end - device pci 11.2 off end - device pci 11.3 off end - device pci 11.4 off end - device pci 11.5 off end - device pci 12.0 off end # SensorHUB - device pci 12.5 off end - device pci 12.6 off end # GSPI2 - device pci 13.0 off end # GSPI3 - device pci 13.1 off end - device pci 14.0 on + device ref pcie5 on end + device ref igpu on end + device ref dtt on end + device ref ipu on end + device ref pcie4_0 on end + device ref pcie4_1 on end + device ref tbt_pcie_rp0 on end + device ref tbt_pcie_rp1 on end + device ref tcss_xhci on end + device ref tcss_dma0 on end + device ref xhci on chip drivers/usb/acpi register "desc" = ""Root Hub"" register "type" = "UPC_TYPE_HUB" @@ -199,49 +175,33 @@ end end end - end # USB3.1 xHCI - device pci 14.1 off end # USB3.1 xDCI - device pci 14.2 off end # Shared RAM - device pci 14.3 on + end + device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device generic 0 on end end - end # CNVi: WiFi - device pci 15.0 on end # I2C0 - device pci 15.1 on end # I2C1 - device pci 15.2 on end # I2C2 - device pci 15.3 on end # I2C3 - device pci 16.0 on end # HECI1 - device pci 16.1 off end # HECI2 - device pci 16.2 off end # CSME - device pci 16.3 off end # CSME - device pci 16.4 off end # HECI3 - device pci 16.5 off end # HECI4 - device pci 17.0 on end # SATA - device pci 19.0 off end # I2C4 - device pci 19.1 on end # I2C5 - device pci 19.2 off end # UART2 - device pci 1c.0 on end # RP1 - device pci 1c.1 off end # RP2 - device pci 1c.2 on end # RP3 # W/A to FSP issue - device pci 1c.3 on end # RP4 # W/A to FSP issue - device pci 1c.4 on end # RP5 - device pci 1c.5 on end # RP6 - device pci 1c.6 off end # RP7 - device pci 1c.7 on end # RP8 - device pci 1d.0 on end # RP9 - device pci 1d.1 on end # RP10 - device pci 1d.2 off end # RP11 - device pci 1d.3 off end # RP12 - device pci 1e.0 on end # UART0 - device pci 1e.1 off end # UART1 - device pci 1e.2 on end # GSPI0 - device pci 1e.3 off end # GSPI1 - device pci 1f.0 on end # eSPI - device pci 1f.1 on end # P2SB - device pci 1f.2 hidden end # PMC - device pci 1f.3 on + end + device ref i2c0 on end + device ref i2c1 on end + device ref i2c2 on end + device ref i2c3 on end + device ref heci1 on end + device ref sata on end + device ref i2c5 on end + device ref pcie_rp1 on end + device ref pcie_rp3 on end + device ref pcie_rp4 on end + device ref pcie_rp5 on end + device ref pcie_rp6 on end + device ref pcie_rp8 on end + device ref pcie_rp9 on end + device ref pcie_rp10 on end + device ref uart0 on end + device ref gspi0 on end + device ref pch_espi on end + device ref p2sb on end + device ref hda on chip drivers/intel/soundwire device generic 0 on chip drivers/soundwire/alc711 @@ -251,10 +211,8 @@ end end end - end # Intel Audio SNDW - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # SPI - device pci 1f.6 off end # GbE - device pci 1f.7 off end # TH + end + device ref smbus on end + device ref fast_spi on end end end diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_m_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_m_ext_ec/overridetree.cb index 68a1bfa..133a737 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_m_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_m_ext_ec/overridetree.cb @@ -1,13 +1,13 @@ chip soc/intel/alderlake device domain 0 on - device pci 1f.0 on + device ref pch_espi on chip ec/google/chromeec use conn0 as mux_conn[0] use conn1 as mux_conn[1] device pnp 0c09.0 on end end - end # eSPI - device pci 1f.2 hidden + end + device ref pmc hidden
# The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. @@ -29,6 +29,6 @@ end end end - end # PMC + end end end diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb index 9130a12..bfc8991 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb @@ -1,15 +1,15 @@ chip soc/intel/alderlake
device domain 0 on - device pci 1f.0 on + device ref pch_espi on chip ec/google/chromeec use conn0 as mux_conn[0] use conn1 as mux_conn[1] use conn2 as mux_conn[2] device pnp 0c09.0 on end end - end # eSPI - device pci 1f.2 hidden + end + device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. chip drivers/intel/pmc_mux @@ -37,6 +37,6 @@ end end end - end # PMC + end end end
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Subrata Banik (Code Review)