Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Lean Sheng Tan, Patrick Rudolph.
Hello build bot (Jenkins), Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Werner Zeh, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/54959
to look at the new patch set (#10).
Change subject: soc/intel/elkhartlake: Update FSP-S UPD LPSS related configs
......................................................................
soc/intel/elkhartlake: Update FSP-S UPD LPSS related configs
Add Silicon upd settings for LPSS (GSPI/UART/I2C).
Signed-off-by: Lean Sheng Tan lean.sheng.tan@intel.com
Change-Id: Ib0c3cd1d37ff9892d09d6d86ac50e230549c7e53
---
M src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
M src/soc/intel/elkhartlake/chip.h
M src/soc/intel/elkhartlake/fsp_params.c
3 files changed, 139 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/54959/10
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ib0c3cd1d37ff9892d09d6d86ac50e230549c7e53
Gerrit-Change-Number: 54959
Gerrit-PatchSet: 10
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