Attention is currently required from: Appukuttan V K, Ashish Kumar Mishra, Bora Guvendik, Saurabh Mishra.
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79900?usp=email )
Change subject: soc/intel/common: Add lunarlake device IDs ......................................................................
Patch Set 1:
(4 comments)
File src/soc/intel/common/block/spi/spi.c:
https://review.coreboot.org/c/coreboot/+/79900/comment/9ad4eaab_67a24ef2 : PS1, Line 126: PCI_DID_INTEL_LNL_HWSEQ_SPI, other platform just added GSPI.
File src/soc/intel/common/block/uart/uart.c:
https://review.coreboot.org/c/coreboot/+/79900/comment/eec1f0f8_5c8d767f : PS1, Line 318: case PCI_DID_INTEL_LNL_UART0: Could you move to line 312? Latest platform should be first.
https://review.coreboot.org/c/coreboot/+/79900/comment/f39dffe6_2fbe261f : PS1, Line 326: Could you move to line 312? Latest platform should be first.
https://review.coreboot.org/c/coreboot/+/79900/comment/ddc160ab_e6dc85b9 : PS1, Line 334: Could you move to line 312? Latest platform should be first.